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Mikko H. Lipasti

Affiliations: 
University of Wisconsin, Madison, Madison, WI 
Area:
Electronics and Electrical Engineering, Computer Science
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Children

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Kevin M. Lepak grad student 2003 UW Madison
Harold W. Cain grad student 2004 UW Madison
Ilhyun Kim grad student 2004 UW Madison
Gordon B. Bell grad student 2007 UW Madison
Natalie D. Enright Jerger grad student 2008 UW Madison
Lixin Su grad student 2008 UW Madison
Erika Gunadi grad student 2010 UW Madison
Dana M. Vantrease grad student 2010 UW Madison
Atif G. Hashmi grad student 2011 UW Madison
Mitchell B. Hayenga grad student 2013 UW Madison
Andrew T. Nere grad student 2013 UW Madison
Sean B. Franey grad student 2014 UW Madison
Vignyan R. Kothinti Naresh grad student 2014 UW Madison
Mohammad A. Zulfiqar grad student 2014 UW Madison

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Publications

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Singh R, Ravi GS, Lipasti M, et al. (2020) Value Locality Based Approximation With ODIN Ieee Computer Architecture Letters. 19: 88-91
Shukla R, Lipasti M, Van Essen B, et al. (2019) REMODEL: Rethinking Deep CNN Models to Detect and Count on a NeuroSynaptic System. Frontiers in Neuroscience. 13: 4
Shukla R, Khoram S, Jorgensen E, et al. (2018) Computing Generalized Matrix Inverse on Spiking Neural Substrate. Frontiers in Neuroscience. 12: 115
Naresh VRK, Gope D, Lipasti MH. (2017) The CURE: Cluster Communication Using Registers Acm Transactions in Embedded Computing Systems. 16: 124
Ravi GS, Lipasti M. (2017) Timing Speculation in Multi-Cycle Data Paths Ieee Computer Architecture Letters. 16: 84-87
Zheng Z, Wang Z, Lipasti M. (2015) Adaptive Cache and Concurrency Allocation on GPGPUs Ieee Computer Architecture Letters. 14: 90-93
Hayenga M, Naresh VRK, Lipasti MH. (2014) Revolver: Processor architecture for power efficient loop execution Proceedings - International Symposium On High-Performance Computer Architecture. 591-602
Gope D, Lipasti MH. (2014) Atomic SC for simple in-order processors Proceedings - International Symposium On High-Performance Computer Architecture. 404-415
Palframan DJ, Kim NS, Lipasti MH. (2013) Resilient high-performance processors with spare RIBs Ieee Micro. 33: 26-34
Reddy V, Gilani SZ, Gunadi E, et al. (2013) REEL: Reducing effective execution latency of floating point operations Proceedings of the International Symposium On Low Power Electronics and Design. 187-192
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