Elizabeth M. Rudnick
Affiliations: | University of Illinois, Urbana-Champaign, Urbana-Champaign, IL |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Elizabeth Rudnick"
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Publications
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Niggemeyer D, Rudnick EM. (2004) Automatic generation of diagnostic memory tests based on fault decomposition and output tracing Ieee Transactions On Computers. 53: 1134-1146 |
Niggemeyer D, Rudnick EM. (2003) A Data Acquisition Methodology for on-Chip Repair of Embedded Memories Acm Transactions On Design Automation of Electronic Systems. 8: 560-576 |
Yu X, Fin A, Fummi F, et al. (2002) A genetic testing framework for digital integrated circuits Proceedings of the International Conference On Tools With Artificial Intelligence. 521-526 |
Abramovici M, Yu X, Rudnick EM. (2002) Low-cost sequential ATPG with clock-control DFT Proceedings - Design Automation Conference. 243-248 |
Hartanto I, Venkataraman S, Fuchs WK, et al. (2001) Diagnostic simulation of stuck-at faults in sequential circuits using compact lists Acm Transactions On Design Automation of Electronic Systems. 6: 471-489 |
Fummi F, Boschini M, Yu X, et al. (2001) Sequential circuit test generation using a symbolic/genetic hybrid approach Journal of Electronic Testing: Theory and Applications (Jetta). 17: 321-330 |
Niggemeyer D, Rudnick EM. (2001) Automatic generation of diagnostic March tests Proceedings of the Ieee Vlsi Test Symposium. 299-304 |
Shin J, Yu X, Rudnick EM, et al. (2001) At-speed logic BIST using a frozen clock testing strategy Ieee International Test Conference (Tc). 64-71 |
Rudnick EM, Abramovici M. (2000) Compact test generation using a frozen clock testing strategy Journal of Information Science and Engineering. 16: 703-717 |
Hsiao MS, Rudnick EM, Patel JH. (2000) Dynamic state traversal for sequential circuit test generation Acm Transactions On Design Automation of Electronic Systems. 5: 548-565 |