Warin Sootkaneung, Ph.D.
Affiliations: | 2012 | Electrical Engineering | University of Wisconsin, Madison, Madison, WI |
Area:
Computer EngineeringGoogle:
"Warin Sootkaneung"Parents
Sign in to add mentorKewal K. Saluja | grad student | 2012 | UW Madison | |
(Reliability Improvement against Soft Errors in Nanometer Digital Circuits.) |
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Publications
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Sootkaneung W, Saluja KK. (2012) Impact of body bias based leakage power reduction on soft error rate Proceedings of the Ieee International Conference On Vlsi Design. 74-79 |
Sootkaneung W, Saluja KK. (2011) Soft error reduction through gate input dependent weighted sizing in combinational circuits Proceedings of the 12th International Symposium On Quality Electronic Design, Isqed 2011. 603-610 |
Sootkaneung W, Saluja KK. (2010) On techniques for handling soft errors in digital circuits Proceedings - International Test Conference |
Sootkaneung W, Saluja KK. (2010) Gate input reconfiguration for combating soft errors in combinational circuits Proceedings of the International Conference On Dependable Systems and Networks. 107-112 |
Sootkaneung W, Saluja KK. (2010) Optimizing device size for soft error resilience in sub-micron logic circuits Proceedings of the 2nd Asia Symposium On Quality Electronic Design, Asqed 2010. 235-242 |
Saluja KK, Vijayakumar S, Sootkaneung W, et al. (2008) NBTI degradation: A problem or a scare? Proceedings of the Ieee International Frequency Control Symposium and Exposition. 137-142 |