Zaher S. Andraus, Ph.D.
Affiliations: | 2009 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Computer Science, Electronics and Electrical Engineering, MathematicsGoogle:
"Zaher Andraus"Parents
Sign in to add mentor| Karem A. Sakallah | grad student | 2009 | University of Michigan | |
| (Automatic formal verification of control logic in hardware designs.) | ||||
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| Liffiton M, Mneimneh M, Lynce I, et al. (2009) A branch and bound algorithm for extracting smallest minimal unsatisfiable subformulas Constraints - An International Journal. 14: 415-442 |
| Andraus ZS, Liffiton MH, Sakallah KA. (2008) Reveal: A formal verification tool for verilog designs Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 5330: 343-352 |
| Andraus ZS, Liffiton MH, Sakallah KA. (2006) Refinement strategies for verification methods based on datapath abstraction Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2006: 19-24 |
| Andraus ZS, Sakallah KA. (2004) Automatic abstraction and verification of verilog models Proceedings - Design Automation Conference. 218-223 |
| Oh Y, Mneimneh MN, Andraus ZS, et al. (2004) AMUSE: A minimally-unsatisfiable subformula extractor Proceedings - Design Automation Conference. 518-523 |