Maryam Ashouei, Ph.D.
Affiliations: | 2007 | Georgia Institute of Technology, Atlanta, GA |
Area:
Electronics and Electrical EngineeringGoogle:
"Maryam Ashouei"Parents
Sign in to add mentor| Abhijit Chatterjee | grad student | 2007 | Georgia Tech | |
| (Algorithms and methodology for post-manufacture adaptation to process variations and induced noise in deeply scaled CMOS technologies.) | ||||
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Publications
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| Liu B, de Gyvez JP, Ashouei M. (2013) Sub-threshold standard cell sizing methodology and library comparison Journal of Low Power Electronics and Applications. 3: 233-249 |
| Gemmeke T, Ashouei M, Liu B, et al. (2013) Cell libraries for robust low-voltage operation in nanometer technologies Solid-State Electronics. 84: 132-141 |
| Liu B, Ashouei M, Huisken J, et al. (2012) Standard cell sizing for subthreshold operation Proceedings - Design Automation Conference. 962-967 |
| Gemmeke T, Ashouei M. (2012) Variability aware cell library optimization for reliable sub-threshold operation European Solid-State Circuits Conference. 42-45 |
| Sharma V, Cosemans S, Ashouei M, et al. (2012) Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM Proceedings -Design, Automation and Test in Europe, Date. 1042-1047 |
| Zhou J, Ashouei M, Kinniment D, et al. (2011) Sub-threshold synchronizer Microelectronics Journal. 42: 840-850 |
| Ashouei M, Chatterjee A, Singh AD. (2010) Post-manufacture tuning for nano-CMOS yield recovery using reconfigurable logic Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 675-679 |
| Sathanur A, Ashouei M, Huisken J. (2010) Improving Efficiency of Power Gated Circuits through Concurrent Optimization of Power Switch Size and Forward Body Biasing 2010 Ieee International Conference On Integrated Circuit Design and Technology, Icicdt 2010. 178-181 |
| Zhou J, Ashouei M, Kinniment D, et al. (2010) Extending synchronization from super-threshold to sub-threshold region Proceedings - International Symposium On Asynchronous Circuits and Systems. 85-93 |
| Ashouei M, Chatterjee A. (2009) Checksum-based probabilistic transient-error compensation for linear digital systems Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 1447-1460 |