Sagar S. Sabade, Ph.D.
Affiliations: | 2004 | Texas A & M University, College Station, TX, United States |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Sagar Sabade"Parents
Sign in to add mentorDuncan M. Walker | grad student | 2004 | Texas A & M | |
(Integrated circuit outlier identification by multiple parameter correlation.) |
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Publications
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Sabade SS, Walker DMH. (2006) Estimation of fault-free leakage current using wafer-level spatial information Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 14: 91-94 |
Sabade SS, Walker DM. (2005) IC outlier identification using multiple test metrics Ieee Design and Test of Computers. 22: 586-595 |
Sabade SS, Walker DM. (2004) I |
Sabade S. (2004) Leakage current-based testing of CMOS ICs Ieee Potentials. 23: 28-32 |
Sabade SS, Walker DMH. (2004) IDDQ data analysis using neighbor current ratios Journal of Systems Architecture. 50: 287-294 |
Sabade SS, Walker DMH. (2004) Comparison of effectiveness of current ratio and delta-I |
Sabade SS, Walker DMH. (2004) Comparison of wafer-level spatial I |
Sabade SS, Walker DMH. (2003) Use of multiple I |
Sabade SS, Walker DMH. (2003) CROWNE: Current ratio outliers with neighbor estimator Proceedings - Ieee International Symposium On Defect and Fault Tolerance in Vlsi Systems. 2003: 132-139 |
Sabade SS, Walker DMH. (2003) Immediate neighbor difference I<inf>DDQ</inf> test (INDIT) for outlier identification Proceedings of the Ieee International Conference On Vlsi Design. 2003: 361-366 |