Prasanth Mangalagiri, Ph.D.
Affiliations: | 2010 | Pennsylvania State University, State College, PA, United States |
Area:
Computer Engineering, Computer Science, Electronics and Electrical EngineeringGoogle:
"Prasanth Mangalagiri"Parents
Sign in to add mentor| Vijaykrishnan Narayanan | grad student | 2010 | Penn State | |
| (A reliable design flow for platform FPGAs.) | ||||
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Publications
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| Mangalagiri P, Narayanan V. (2009) Lifetime reliability aware design flow techniques for dual-vdd based platform FPGAs Proceedings of the 2009 Ieee Computer Society Annual Symposium On Vlsi, Isvlsi 2009. 61-66 |
| Bae S, Mangalagiri P, Vijaykrishnan N. (2009) Exploiting clock skew scheduling for FPGA Proceedings -Design, Automation and Test in Europe, Date. 1524-1529 |
| Mangalagiri P, Bae S, Krishnan R, et al. (2008) Thermal-aware reliability analysis for platform FPGAs Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 722-727 |
| Srinivasan S, Mangalagiri P, Xie Y, et al. (2007) FPGA routing architecture analysis under variations 2007 Ieee International Conference On Computer Design, Iccd 2007. 152-157 |
| Srinivasan S, Mangalagiri P, Xie Y, et al. (2006) FLAW: FPGA lifetime awareness Proceedings - Design Automation Conference. 630-635 |