Ashish N. Srivastava, Ph.D.
Affiliations: | 2005 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Electronics and Electrical EngineeringGoogle:
"Ashish Srivastava"Parents
Sign in to add mentor| Dennis M. Sylvester | grad student | 2005 | University of Michigan | |
| (Statistical and deterministic power optimization techniques using multiple supply and threshold voltages.) | ||||
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Publications
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| Srivastava A, Chopra K, Shah S, et al. (2008) A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 272-285 |
| Blaauw D, Chopra K, Srivastava A, et al. (2008) Statistical timing analysis: From basic principles to state of the art Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 589-607 |
| Srivastava A, Kachru T, Sylvester D. (2007) Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 67-79 |
| Rao R, Srivastava A, Blaauw D, et al. (2004) Statistical Analysis of Subthreshold Leakage Current for VLSI Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 131-139 |
| Srivastava A, Sylvester D. (2004) Minimizing total power by simultaneous V/sub dd//V/sub th/ assignment Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 665-677 |