Ilya M. Issenin, Ph.D.
Affiliations: | 2007 | University of California, Irvine, Irvine, CA |
Area:
Computer Science, Electronics and Electrical EngineeringGoogle:
"Ilya Issenin"Parents
Sign in to add mentor| Nikil Dutt | grad student | 2007 | UC Irvine | |
| (Multiprocessor System-on-Chip data memory customization for embedded array-intensive applications.) | ||||
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Publications
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| Lee K, Shrivastava A, Issenin I, et al. (2009) Partially Protected Caches to Reduce Failures Due to Soft Errors in Multimedia Applications Ieee Transactions On Very Large Scale Integration Systems. 17: 1343-1347 |
| Cho D, Pasricha S, Issenin I, et al. (2009) Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 28: 554-567 |
| Shrivastava A, Issenin I, Dutt N, et al. (2009) Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 28: 461-465 |
| Issenin I, Brockmeyer E, Durinck B, et al. (2008) Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1439-1452 |
| Issenin I, Dutt N. (2008) Using FORAY models to enable MPSoC memory optimizations International Journal of Parallel Programming. 36: 93-113 |
| Issenin I, Brockmeyer E, Miranda M, et al. (2007) DRDU Acm Transactions On Design Automation of Electronic Systems. 12: 15 |