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Massoud Pedram - Publications

Affiliations: 
Electrical Engineering: Doctor of Philosophy University of Southern California, Los Angeles, CA, United States 
Area:
Electronics and Electrical Engineering
Website:
https://viterbi.usc.edu/directory/faculty/Pedram/Massoud
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216 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Bank-Tavakoli E, Ghasemzadeh SA, Kamal M, Afzali-Kusha A, Pedram M. POLAR: A Pipelined/Overlapped FPGA-Based LSTM Accelerator Ieee Transactions On Very Large Scale Integration Systems. 28: 838-842. DOI: 10.1109/Tvlsi.2019.2947639  0.41
2020 Soltani M, Kamal M, Afzali-Kusha A, Pedram M. RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory Ieee Transactions On Very Large Scale Integration Systems. 28: 287-291. DOI: 10.1109/Tvlsi.2019.2943073  0.309
2020 Yarmand R, Kamal M, Afzali-Kusha A, Pedram M. DART: A Framework for Determining Approximation Levels in an Approximable Memory Hierarchy Ieee Transactions On Very Large Scale Integration Systems. 28: 273-286. DOI: 10.1109/Tvlsi.2019.2935832  0.307
2020 Haghi P, Kamal M, Afzali-Kusha A, Pedram M. O⁴-DNN: A Hybrid DSP-LUT-Based Processing Unit With Operation Packing and Out-of-Order Execution for Efficient Realization of Convolutional Neural Networks on FPGA Devices Ieee Transactions On Circuits and Systems I-Regular Papers. 67: 3056-3069. DOI: 10.1109/Tcsi.2020.2986350  0.364
2020 Samimi N, Kamal M, Afzali-Kusha A, Pedram M. Res-DNN: A Residue Number System-Based DNN Accelerator Unit Ieee Transactions On Circuits and Systems I-Regular Papers. 67: 658-671. DOI: 10.1109/Tcsi.2019.2951083  0.357
2020 Kundu S, Nazemi M, Pedram M, Chugg KM, Beerel PA. Pre-Defined Sparsity for Low-Complexity Convolutional Neural Networks Ieee Transactions On Computers. 69: 1045-1058. DOI: 10.1109/Tc.2020.2972520  0.344
2020 Zhang B, Li M, Pedram M. qSSTA: A Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits Ieee Transactions On Applied Superconductivity. 30: 1-12. DOI: 10.1109/Tasc.2020.3005082  0.406
2020 Zhang B, Pedram M. qSTA: A Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits Ieee Transactions On Applied Superconductivity. 30: 1-9. DOI: 10.1109/Tasc.2020.2970218  0.409
2020 Pasandi G, Pedram M. An Efficient Pipelined Architecture for Superconducting Single Flux Quantum Logic Circuits Utilizing Dual Clocks Ieee Transactions On Applied Superconductivity. 30: 2955095. DOI: 10.1109/Tasc.2019.2955095  0.323
2020 Pedram M, Wang L. Energy Efficiency in 5G Cellular Network Systems Ieee Design & Test of Computers. 37: 64-78. DOI: 10.1109/Mdat.2019.2960342  0.32
2019 Pashaeifar M, Kamal M, Afzali-Kusha A, Pedram M. A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 327-340. DOI: 10.1109/Tcsi.2018.2856757  0.369
2019 Lee W, Kang T, Lee J, Han K, Kim J, Pedram M. TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultralow Power Methods Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1758-1770. DOI: 10.1109/Tcad.2018.2859240  0.447
2019 Tabatabaei-Nikkhah S, Zahedi M, Kamal M, Afzali-Kusha A, Pedram M. ACHILLES: Accuracy-Aware High-Level Synthesis Considering Online Quality Management Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1452-1465. DOI: 10.1109/Tcad.2018.2846625  0.385
2019 Shahsavani SN, Pedram M. A Minimum-Skew Clock Tree Synthesis Algorithm for Single Flux Quantum Logic Circuits Ieee Transactions On Applied Superconductivity. 29: 1-13. DOI: 10.1109/Tasc.2019.2943930  0.385
2019 Lin T, Edwards T, Pedram M. qGDR: A Via-Minimization-Oriented Routing Tool for Large-Scale Superconductive Single-Flux-Quantum Circuits Ieee Transactions On Applied Superconductivity. 29: 1-12. DOI: 10.1109/Tasc.2019.2915771  0.412
2019 Katam NK, Mukhanov O, Pedram M. Simulation Analysis and Energy-Saving Techniques for ERSFQ Circuits Ieee Transactions On Applied Superconductivity. 29: 1-7. DOI: 10.1109/Tasc.2019.2904688  0.431
2019 Fourie CJ, Law M, Wang Y, Annavaram M, Beerel P, Gupta S, Nazarian S, Pedram M, Jackman K, Botha MM, Razmkhah S, Febvre P, Ayala CL, Xu Q, Yoshikawa N, et al. ColdFlux Superconducting EDA and TCAD Tools Project: Overview and Progress Ieee Transactions On Applied Superconductivity. 29: 1-7. DOI: 10.1109/Tasc.2019.2892115  0.356
2019 Katam NK, Pedram M. Timing Characterization for Static Timing Analysis of Single Flux Quantum Circuits Ieee Transactions On Applied Superconductivity. 29: 1-8. DOI: 10.1109/Tasc.2019.2891166  0.4
2019 Pasandi G, Pedram M. PBMap: A Path Balancing Technology Mapping Algorithm for Single Flux Quantum Logic Circuits Ieee Transactions On Applied Superconductivity. 29: 1-14. DOI: 10.1109/Tasc.2018.2880343  0.381
2019 Lin T, Li Y, Pedram M, Chen L. Design Space Exploration of Memory Controller Placement in Throughput Processors with Deep Learning Ieee Computer Architecture Letters. 18: 51-54. DOI: 10.1109/Lca.2019.2905587  0.325
2019 Pasandi G, Mehrabi K, Ebrahimi B, Fakhraei SM, Afzali-Kusha A, Pedram M. Low-power data encoding/decoding for energy-efficient static random access memory design Iet Circuits, Devices & Systems. 13: 1152-1159. DOI: 10.1049/Iet-Cds.2018.5564  0.41
2018 Abolmaali S, Kamal M, Afzali-Kusha A, Pedram M. An Efficient False Path-Aware Heuristic Critical Path Selection Method with High Coverage of the Process Variation Space Acm Transactions On Design Automation of Electronic Systems. 23: 32. DOI: 10.1145/3177866  0.391
2018 Pashaeifar M, Kamal M, Afzali-Kusha A, Pedram M. Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications Ieee Transactions On Very Large Scale Integration Systems. 26: 2530-2541. DOI: 10.1109/Tvlsi.2018.2859939  0.401
2018 Hwang I, Pedram M. Hierarchical, Portfolio Theory-Based Virtual Machine Consolidation in a Compute Cloud Ieee Transactions On Services Computing. 11: 63-77. DOI: 10.1109/Tsc.2016.2531672  0.331
2018 Iranfar A, Kamal M, Afzali-Kusha A, Pedram M, Atienza D. TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1532-1545. DOI: 10.1109/Tcad.2017.2768417  0.38
2018 Ansari M, Fayyazi A, Banagozar A, Maleki MA, Kamal M, Afzali-Kusha A, Pedram M. PHAX: Physical Characteristics Aware Ex-Situ Training Framework for Inverter-Based Memristive Neuromorphic Circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1602-1613. DOI: 10.1109/Tcad.2017.2764070  0.36
2018 Han K, Lee J, Lee J, Lee W, Pedram M. TEI-NoC: Optimizing Ultralow Power NoCs Exploiting the Temperature Effect Inversion Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 458-471. DOI: 10.1109/Tcad.2017.2693269  0.492
2018 Katam NK, Pedram M. Logic Optimization, Complex Cell Design, and Retiming of Single Flux Quantum Circuits Ieee Transactions On Applied Superconductivity. 28: 1-9. DOI: 10.1109/Tasc.2018.2856833  0.36
2018 Katam NK, Mukhanov OA, Pedram M. Superconducting Magnetic Field Programmable Gate Array Ieee Transactions On Applied Superconductivity. 28: 1-12. DOI: 10.1109/Tasc.2018.2797262  0.42
2017 Abolmaali S, Mansouri-Ghiasi N, Kamal M, Afzali-Kusha A, Pedram M. Efficient Critical Path Identification Based on Viability Analysis Method Considering Process Variations Ieee Transactions On Very Large Scale Integration Systems. 25: 2668-2672. DOI: 10.1109/Tvlsi.2017.2703623  0.433
2017 Nakhaee F, Kamal M, Afzali-Kusha A, Pedram M, Fakhraie SM, Dorosti H. Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications Integration. 61: 29-38. DOI: 10.1016/J.Vlsi.2017.10.013  0.391
2017 Hemmat M, Kamal M, Afzali-Kusha A, Pedram M. Hybrid TFET-MOSFET circuit Integration. 57: 11-19. DOI: 10.1016/J.Vlsi.2016.11.001  0.441
2016 Kamal M, Afzali-Kusha A, Safari S, Pedram M. Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions Acm Transactions On Design Automation of Electronic Systems. 21: 28. DOI: 10.1145/2830566  0.368
2016 Bahadori M, Kamal M, Afzali-Kusha A, Pedram M. High-Speed and Energy-Efficient Carry Skip Adder Operating under a Wide Range of Supply Voltage Levels Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 421-433. DOI: 10.1109/Tvlsi.2015.2405133  0.447
2016 Wang Y, Lin X, Pedram M. A Near-Optimal Model-Based Control Algorithm for Households Equipped With Residential Photovoltaic Power Generation and Energy Storage Systems Ieee Transactions On Sustainable Energy. 7: 77-86. DOI: 10.1109/Tste.2015.2467190  0.562
2016 Goudarzi H, Pedram M. Hierarchical SLA-Driven Resource Management for Peak Power-Aware and Energy-Efficient Operation of a Cloud Datacenter Ieee Transactions On Cloud Computing. 4: 222-236. DOI: 10.1109/TCC.2015.2474369  0.566
2016 Ahmadi Balef H, Kamal M, Afzali-Kusha A, Pedram M. All-region statistical model for delay variation based on log-skew-normal distribution Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 1503-1508. DOI: 10.1109/Tcad.2015.2511148  0.325
2016 Xie Q, Shin D, Chang N, Pedram M. Joint charge and thermal management for batteries in portable systems with hybrid power sources Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 611-622. DOI: 10.1109/Tcad.2015.2474410  0.406
2016 Bahadori M, Kamal M, Afzali-Kusha A, Pedram M. A comparative study on performance and reliability of 32-bit binary adders Integration, the Vlsi Journal. 53: 54-67. DOI: 10.1016/J.Vlsi.2015.12.002  0.426
2016 Kamal M, Xie Q, Pedram M, Afzali-Kusha A, Safari S. An efficient temperature dependent hot carrier injection reliability simulation flow Microelectronics Reliability. 57: 10-19. DOI: 10.1016/J.Microrel.2015.12.008  0.365
2015 Ahmadi H, Afzali-Kusha A, Pedram M, Mosaffa M. Flexible Prime-Field Genus 2 Hyperelliptic Curve Cryptography Processor with Low Power Consumption and Uniform Power Draw Etri Journal. 37: 107-117. DOI: 10.4218/Etrij.15.0114.0418  0.415
2015 Kamal M, Afzali-Kusha A, Safari S, Pedram M. OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs Acm Transactions in Embedded Computing Systems. 14: 72. DOI: 10.1145/2764458  0.318
2015 Hwang I, Pedram M. A Comparative Study of the Effectiveness of CPU Consolidation Versus Dynamic Voltage and Frequency Scaling in a Virtualized Multicore Server Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2015.2499601  0.467
2015 Lee W, Wang Y, Pedram M. Optimizing a Reconfigurable Power Distribution Network in a Multicore Platform Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 34: 1110-1123. DOI: 10.1109/Tcad.2015.2396998  0.556
2015 Ansari M, Afzali-Kusha H, Ebrahimi B, Navabi Z, Afzali-Kusha A, Pedram M. A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies Integration. 50: 91-106. DOI: 10.1016/J.Vlsi.2015.02.002  0.358
2015 Kamal M, Afzali-Kusha A, Safari S, Pedram M. Design of NBTI-resilient extensible processors Integration. 49: 22-34. DOI: 10.1016/J.Vlsi.2014.12.001  0.406
2015 Triki M, Wang Y, Ammari AC, Pedram M. Hierarchical power management of a system with autonomously power-managed components using reinforcement learning Integration. 48: 10-20. DOI: 10.1016/J.Vlsi.2014.06.001  0.587
2015 Eghbalkhah B, Kamal M, Afzali-Kusha H, Afzali-Kusha A, Ghaznavi-Ghoushchi MB, Pedram M. Workload and temperature dependent evaluation of BTI-induced lifetime degradation in digital circuits Microelectronics Reliability. 55: 1152-1162. DOI: 10.1016/J.Microrel.2015.06.004  0.384
2015 Eghbalkhah B, Kamal M, Afzali-Kusha A, Ghaznavi-Ghoushchi MB, Pedram M. CSAM: A clock skew-aware aging mitigation technique Microelectronics Reliability. 55: 282-290. DOI: 10.1016/J.Microrel.2014.09.033  0.423
2015 Goudarzi H, Pedram M. Achieving Energy Efficiency in Datacenters by Virtual Machine Sizing, Replication, and Placement Advances in Computers. DOI: 10.1016/Bs.Adcom.2015.11.001  0.619
2015 Ebrahimi B, Asadpour R, Afzali-Kusha A, Pedram M. A FinFET SRAM cell design with BTI robustness at high supply voltages and high yield at low supply voltages International Journal of Circuit Theory and Applications. 43: 2011-2024. DOI: 10.1002/Cta.2057  0.356
2014 Kamal M, Afzali-Kusha A, Safari S, Pedram M. Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors Acm Journal On Emerging Technologies in Computing Systems. 10: 19. DOI: 10.1145/2567665  0.326
2014 Hatami S, Helaoui M, Ghannouchi FM, Pedram M. Single-bit pseudoparallel processing low-oversampling delta-sigma modulator suitable for sdr wireless transmitters Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 922-931. DOI: 10.1109/Tvlsi.2013.2256808  0.648
2014 Yazdanbakhsh A, Kamal M, Fakhraie SM, Afzali-Kusha A, Safari S, Pedram M. Implementation-aware selection of the custom instruction set for extensible processors Microprocessors and Microsystems. 38: 681-691. DOI: 10.1016/J.Micpro.2014.05.007  0.368
2013 Ghavami B, Raji M, Pedram H, Pedram M. Statistical functional yield estimation and enhancement of CNFET-based VLSI circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 887-900. DOI: 10.1109/Tvlsi.2012.2197765  0.353
2013 Shin D, Kim Y, Chang N, Pedram M. Dynamic Driver Supply Voltage Scaling for Organic Light Emitting Diode Displays Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 1017-1030. DOI: 10.1109/Tcad.2013.2248193  0.442
2013 Abrishami H, Hatami S, Pedram M. Design and multicorner optimization of the energy-delay product of CMOS flip-flops under the negative bias temperature instability effect Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 869-881. DOI: 10.1109/Tcad.2012.2237227  0.813
2013 Patel K, Annavaram M, Pedram M. NFRA: Generalized network flow-based resource allocation for hosting centers Ieee Transactions On Computers. 62: 1772-1785. DOI: 10.1109/Tc.2012.253  0.443
2013 Goudarzi H, Pedram M. Force-directed geographical load balancing and scheduling for batch jobs in distributed datacenters Proceedings - Ieee International Conference On Cluster Computing, Iccc. DOI: 10.1109/CLUSTER.2013.6702637  0.557
2013 Goudarzi H, Pedram M. Geographical load balancing for online service applications in distributed datacenters Ieee International Conference On Cloud Computing, Cloud. 351-358. DOI: 10.1109/CLOUD.2013.77  0.555
2013 Saeedi M, Pedram M. Linear-depth quantum circuits for n-qubit Toffoli gates with no ancilla Physical Review a - Atomic, Molecular, and Optical Physics. 87. DOI: 10.1103/Physreva.87.062318  0.306
2013 Kamal M, Afzali-Kusha A, Safari S, Pedram M. Considering the effect of process variations during the ISA extension design flow Microprocessors and Microsystems. 37: 713-724. DOI: 10.1016/J.Micpro.2012.09.014  0.376
2013 Kamal M, Yazdanbakhsh A, Noori H, Afzali-Kusha A, Pedram M. A new merit function for custom instruction selection under an area budget constraint Design Automation For Embedded Systems. 17: 1-25. DOI: 10.1007/S10617-013-9117-2  0.327
2012 Afzal B, Ebrahimi B, Afzali-Kusha A, Pedram M. An accurate analytical I-V model for sub-90-nm MOSFETs and its application to read static noise margin modeling Journal of Zhejiang University: Science C. 13: 58-70. DOI: 10.1631/Jzus.C1100090  0.367
2012 Afzal B, Afzali-Kusha A, Pedram M. Analytical modeling of read margin probability distribution function of static random access memory cells in presence of process variations and negative bias temperature instability effect Japanese Journal of Applied Physics. 51. DOI: 10.1143/Jjap.51.114301  0.327
2012 Pakbaznia E, Pedram M. Design of a tri-modal multi-threshold cmos switch with application to data retentive power gating Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 380-385. DOI: 10.1109/Tvlsi.2010.2102054  0.795
2012 Goudarzi H, Pedram M. Energy-efficient virtual machine replication and placement in a cloud computing system Proceedings - 2012 Ieee 5th International Conference On Cloud Computing, Cloud 2012. 750-757. DOI: 10.1109/CLOUD.2012.107  0.555
2012 Aghababa H, Khosropour A, Afzali-Kusha A, Forouzandeh B, Pedram M. Statistical estimation of leakage power dissipation in nano-scale complementary metal oxide semiconductor digital circuits using generalised extreme value distribution Iet Circuits Devices & Systems. 6: 273-278. DOI: 10.1049/Iet-Cds.2011.0348  0.378
2012 Aghababa H, Ebrahimi B, Afzali-Kusha A, Pedram M. Probability calculation of read failures in nano-scaled SRAM cells under process variations Microelectronics Reliability. 52: 2805-2811. DOI: 10.1016/J.Microrel.2012.04.022  0.326
2012 Shin D, Kim Y, Wang Y, Chang N, Pedram M. Constant-current regulator-based battery-supercapacitor hybrid architecture for high-rate pulsed load applications☆☆☆ Journal of Power Sources. 205: 516-524. DOI: 10.1016/J.Jpowsour.2011.12.043  0.525
2012 Rong P, Pedram M. A Stochastic Framework for Hierarchical System-Level Power Management Energy-Efficient Distributed Computing Systems. 109-131. DOI: 10.1002/9781118342015.ch4  0.498
2011 Salehi ME, Samadi M, Najibi M, Afzali-Kusha A, Pedram M, Fakhraie SM. Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs Ieee Transactions On Very Large Scale Integration Systems. 19: 1931-1935. DOI: 10.1109/Tvlsi.2010.2057520  0.429
2011 Nazarian S, Fatemi H, Pedram M. Accurate timing and noise analysis of combinational and sequential logic cells using current source modeling Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 92-103. DOI: 10.1109/Tvlsi.2009.2024945  0.693
2011 Ghasemazar M, Pedram M. Optimizing the power-delay product of a linear pipeline by opportunistic time borrowing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 1493-1506. DOI: 10.1109/Tcad.2011.2159218  0.819
2011 Goudarzi H, Pedram M. Maximizing profit in cloud computing system via resource allocation Proceedings - International Conference On Distributed Computing Systems. 1-6. DOI: 10.1109/ICDCSW.2011.52  0.485
2011 Goudarzi H, Pedram M. Multi-dimensional SLA-based resource allocation for multi-tier cloud computing systems Proceedings - 2011 Ieee 4th International Conference On Cloud Computing, Cloud 2011. 324-331. DOI: 10.1109/CLOUD.2011.106  0.566
2011 Ghasemazar M, Pedram M. Variation aware dynamic power management for chip multiprocessor architectures Proceedings -Design, Automation and Test in Europe, Date. 473-478.  0.822
2010 Rokhsat-Yazdi E, Afzali-Kusha A, Pedram M. A High-Efficiency, Auto Mode-Hop, Variable-Voltage, Ripple Control Buck Converter Journal of Power Electronics. 10: 115-124. DOI: 10.6113/Jpe.2010.10.2.115  0.375
2010 Ahmadi HR, Afzali-Kusha A, Pedram M. A power-optimized low-energy elliptic-curve crypto-processor Ieice Electronics Express. 7: 1752-1759. DOI: 10.1587/Elex.7.1752  0.43
2010 Rong P, Pedram M. A markovian decision-based approach for extending the lifetime of a network of batterypowered mobile devices by remote processing Journal of Low Power Electronics. 6: 227-239. DOI: 10.1166/Jolpe.2010.1078  0.592
2010 Jung H, Pedram M. Supervised learning based power management for multicore processors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 1395-1408. DOI: 10.1109/Tcad.2010.2059270  0.464
2010 Hatami S, Pedram M. Efficient representation, stratification, and compression of variational CSM library waveforms using robust principle component analysis Proceedings -Design, Automation and Test in Europe, Date. 1285-1290.  0.634
2010 Jung H, Pedram M. Optimizing the power delivery network in dynamically voltage scaled systems with uncertain power mode transition times Proceedings -Design, Automation and Test in Europe, Date. 351-356.  0.344
2009 Lee W, Patel K, Pedram M. White‐LED backlight control for motion‐blur reduction and power minimization in large LCD TVs Journal of the Society For Information Display. 17: 37-45. DOI: 10.1889/Jsid17.1.37  0.645
2009 Rahmani AM, Afzali-Kusha A, Pedram M. A novel synthetic traffic pattern for power/performance analysis of Network-on-chips using Negative Exponential Distribution Journal of Low Power Electronics. 5: 396-405. DOI: 10.1166/Jolpe.2009.1039  0.31
2009 Rahmani A, Daneshtalab M, Afzali-Kusha A, Pedram M. Forecasting-Based Dynamic Virtual Channel Management for Power Reduction in Network-on-Chips Journal of Low Power Electronics. 5: 385-395. DOI: 10.1166/Jolpe.2009.1038  0.398
2009 Pakbaznia E, Pedram M. Minimizing data center cooling and server power costs Proceedings of the International Symposium On Low Power Electronics and Design. 145-150. DOI: 10.1145/1594233.1594268  0.78
2009 Jung H, Hwang A, Pedram M. Predictive-Flow-Queue-Based Energy Optimization for Gigabit Ethernet Controllers Ieee Transactions On Very Large Scale Integration Systems. 17: 1113-1126. DOI: 10.1109/Tvlsi.2009.2019815  0.499
2009 Jung H, Pedram M. Uncertainty-aware dynamic power management in partially observable domains Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 929-942. DOI: 10.1109/Tvlsi.2008.2009014  0.528
2009 Razavipour G, Afzali-Kusha A, Pedram M. Design and Analysis of Two Low-Power SRAM Cell Structures Ieee Transactions On Very Large Scale Integration Systems. 17: 1551-1555. DOI: 10.1109/Tvlsi.2008.2004590  0.403
2009 Mottaghi-Dastjerdi M, Afzali-Kusha A, Pedram M. BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture Ieee Transactions On Very Large Scale Integration Systems. 17: 302-306. DOI: 10.1109/Tvlsi.2008.2004544  0.438
2009 Amelifard B, Pedram M. Optimal design of the power-delivery network for multiple voltage-island system-on-chips Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 28: 888-900. DOI: 10.1109/Tcad.2009.2017437  0.792
2009 Amelifard B, Fallah F, Pedram M. Low-power fanout optimization using multi threshold voltages and multi channel lengths Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 28: 478-489. DOI: 10.1109/Tcad.2009.2013992  0.806
2009 Pakbaznia E, Pedram M. Design and application of multimodal power gating structures Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 120-126. DOI: 10.1109/ISQED.2009.4810281  0.766
2009 Saneei M, Afzali-Kusha A, Pedram M. Two high-performance and low-power serial communication interfaces for on-chip interconnects Canadian Journal of Electrical and Computer Engineering. 34: 49-56. DOI: 10.1109/Cjece.2009.5291207  0.385
2009 Soltan M, Pedram M. Durability of wireless networks of battery-powered devices 2009 6th Ieee Consumer Communications and Networking Conference, Ccnc 2009. DOI: 10.1109/CCNC.2009.4784845  0.53
2009 Lee W, Patel K, Pedram M. White-LED backlight control for motion-blur reduction and power minimization in large LCD TVs Information Display Archive. 25: 33-33. DOI: 10.1002/J.2637-496X.2009.Tb00017.X  0.612
2008 Rong P, Pedram M. Energy-aware task scheduling and dynamic voltage scaling in a real-time system Journal of Low Power Electronics. 4: 1-10. DOI: 10.1166/Jolpe.2008.154  0.561
2008 Abbasian A, Hatami S, Afzali-Kusha A, Pedram M. Wavelet-based dynamic power management for nonstationary service requests Acm Transactions On Design Automation of Electronic Systems. 13. DOI: 10.1145/1297666.1297679  0.645
2008 Jung H, Pedram M. Continuous frequency adjustment technique based on dynamic workload prediction Proceedings of the Ieee International Frequency Control Symposium and Exposition. 249-254. DOI: 10.1109/VLSI.2008.98  0.335
2008 Amelifard B, Fallah F, Pedram M. Leakage minimization of SRAM cells in a dual-14 and dual-TOX technology Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 851-860. DOI: 10.1109/Tvlsi.2008.2000459  0.804
2008 Abdollahi A, Pedram M. Symmetry detection and boolean matching utilizing a signature-based canonical form of boolean functions Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1128-1137. DOI: 10.1109/TCAD.2008.923256  0.537
2008 Pakbaznia E, Fallah F, Pedram M. Charge recycling in power-gated CMOS circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1798-1811. DOI: 10.1109/Tcad.2008.2003297  0.8
2008 Ghasemazar M, Pedram M. Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 155-160. DOI: 10.1109/ICCAD.2008.4681567  0.814
2008 Pakbaznia E, Pedram M. Coarse-grain MTCMOS sleep transistor sizing using delay budgeting Proceedings -Design, Automation and Test in Europe, Date. 385-390. DOI: 10.1109/DATE.2008.4484711  0.741
2008 Jung H, Pedram M. Resilient dynamic power management under uncertainty Proceedings -Design, Automation and Test in Europe, Date. 224-229. DOI: 10.1109/DATE.2008.4484690  0.316
2008 Nazarian S, Pedram M. Crosstalk-affected delay analysis in nanometer technologies International Journal of Electronics. 95: 903-937. DOI: 10.1080/00207210802312161  0.51
2007 Abdollahi A, Pedram M. Precomputation-Based Guarding and a Robust Power Gating Strategy in Deep Sub-Micron CMOS Journal of Nanoelectronics and Optoelectronics. 2: 171-190. DOI: 10.1166/Jno.2007.203  0.616
2007 Amelifard B, Pedram M. Design of an efficient power delivery network in an soc to enable dynamic power management Proceedings of the International Symposium On Low Power Electronics and Design. 328-333. DOI: 10.1145/1283780.1283850  0.794
2007 Hwang C, Rong P, Pedram M. Sleep transistor distribution in row-based MTCMOS designs Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 235-240. DOI: 10.1145/1228784.1228786  0.523
2007 Nazarian S, Pedram M. Gain-based cell delay modeling 2006 International Symposium On Vlsi Design, Automation and Test, Vlsi-Dat 2006 - Proceedings of Technical Papers. 179-182. DOI: 10.1109/VDAT.2006.258154  0.487
2007 Kang CW, Iranli A, Pedram M. A synthesis approach for coarse-grained antifuse-based FPGAs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1564-1575. DOI: 10.1109/Tcad.2007.895781  0.802
2007 Abbaspour S, Fatemi H, Pedram M. Parameterized non-Gaussian variational gate timing analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1495-1508. DOI: 10.1109/Tcad.2007.893552  0.78
2007 Jung H, Pedram M. Dynamic power management under uncertain information Proceedings -Design, Automation and Test in Europe, Date. 1060-1065. DOI: 10.1109/DATE.2007.364434  0.321
2007 Amelifard B, Pedram M. Optimal selection of voltage regulator modules in a power delivery network Proceedings - Design Automation Conference. 168-173. DOI: 10.1109/DAC.2007.375146  0.783
2006 Abbaspour S, Pedram M, Ajami A, Kashyap C. Fast interconnect and gate timing analysis for performance optimization Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 14: 1383-1388. DOI: 10.1109/Tvlsi.2006.887834  0.809
2006 Iranli A, Lee W, Pedram M. HVS-aware dynamic backlight scaling in TFT-LCDs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 14: 1103-1116. DOI: 10.1109/Tvlsi.2006.884151  0.791
2006 Heydari P, Pedram M. Model-order reduction using variational balanced truncation with spectral shaping Ieee Transactions On Circuits and Systems I: Regular Papers. 53: 879-891. DOI: 10.1109/Tcsi.2005.859772  0.621
2006 Iranli A, Pedram M. Cycle-based decomposition of Markov chains with applications to low-power synthesis and sequence compaction for finite state machines Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2712-2725. DOI: 10.1109/Tcad.2006.882478  0.806
2006 Pedram M, Nazarian S. Thermal modeling, analysis, and management in VLSI circuits: Principles and methods Proceedings of the Ieee. 94: 1487-1501. DOI: 10.1109/JPROC.2006.879797  0.543
2006 Kong P, Pedram M. Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2006: 473-478.  0.352
2006 Nazarian S, Pedram M. Cell delay analysis based on rate-of-current change Proceedings -Design, Automation and Test in Europe, Date. 1.  0.466
2006 Rong P, Pedram M. Determining the optimal timeout values for a power-managed system based on the theory of Markovian processes: Offline and online algorithms Proceedings -Design, Automation and Test in Europe, Date. 1.  0.58
2006 Hwang C, Pedram M. Timing-driven placement based on monotone cell ordering constraints Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2006: 201-206.  0.305
2006 Abdollahi A, Pedram M. Analysis and synthesis of quantum circuits by using quantum decision diagrams Proceedings -Design, Automation and Test in Europe, Date. 1.  0.493
2006 Kang CW, Pedram M. Low-power clustering with minimum logic replication for coarse-grained, antifuse based FPGAs Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 2006: 79-84.  0.306
2006 Nazarian S, Pedram M, Gupta SK, Breuer MA. STAX: Statistical crosstalk target set compaction Proceedings -Design, Automation and Test in Europe, Date. 2.  0.407
2005 Kang CW, Pedram M. A Leakage-Aware Low Power Technology Mapping Algorithm Considering the Hot-Carrier Effect Journal of Low Power Electronics. 1: 133-144. DOI: 10.1166/Jolpe.2005.014  0.355
2005 Choi K, Cheng W, Pedram M. Frame-Based Dynamic Voltage and Frequency Scaling for an MPEG Player Journal of Low Power Electronics. 1: 27-43. DOI: 10.1166/Jolpe.2005.005  0.651
2005 Heydari P, Pedram M. Capacitive coupling noise in high-speed VLSI circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 478-488. DOI: 10.1109/Tcad.2004.842798  0.591
2005 Choi K, Soma R, Pedram M. Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 18-28. DOI: 10.1109/Tcad.2004.839485(410)  0.42
2005 Fallah F, Pedram M. Standby and active leakage current control and minimization in CMOS VLSI circuits Ieice Transactions On Electronics. 509-519. DOI: 10.1093/ietele/e88-c.4.509  0.337
2005 Pedram M, Abdollahi A. Low-power RT-level synthesis techniques: A tutorial Iee Proceedings: Computers and Digital Techniques. 152: 333-343. DOI: 10.1049/ip-cdt:20045111  0.618
2005 Ajami AH, Banerjee K, Pedram M. Scaling analysis of on-chip power grid voltage variations in nanometer scale ULSI Analog Integrated Circuits and Signal Processing. 42: 277-290. DOI: 10.1007/S10470-005-6761-X  0.808
2005 Rong P, Pedram M. Hierarchical power management with application to scheduling Proceedings of the International Symposium On Low Power Electronics and Design. 269-274.  0.535
2005 Abdollahi A, Pedram M. A new canonical form for fast boolean matching in logic synthesis and verification Proceedings - Design Automation Conference. 379-384.  0.534
2005 Iranli A, Pedram M. DTM: Dynamic tone mapping for backlight scaling Proceedings - Design Automation Conference. 612-617.  0.773
2005 Nazarian S, Pedram M, Tuncer E. An empirical study of crosstalk in VDSM technologies Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 317-322.  0.424
2004 Cheng WC, Pedram M. Chromatic encoding: A low power encoding technique for digital visual interface Ieee Transactions On Consumer Electronics. 50: 320-328. DOI: 10.1109/Tce.2004.1277880  0.555
2004 Cheng WC, Pedram M. Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling Ieee Transactions On Consumer Electronics. 50: 25-32. DOI: 10.1109/Tce.2004.1277837  0.551
2004 Aghaghiri Y, Fallah F, Pedram M. Transition reduction in memory buses using sector-based encoding techniques Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 1164-1174. DOI: 10.1109/Tcad.2004.831589  0.808
2004 Shim H, Chang N, Pedram M. A backlight power management framework for battery-operated multimedia systems Ieee Design & Test of Computers. 21: 388-396. DOI: 10.1109/Mdt.2004.43  0.358
2004 Abbaspour S, Pedram M. Gate delay calculation considering the crosstalk capacitances Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 853-858.  0.678
2004 Abbaspour S, Ajami AM, Pedram M, Tuncer E. TFA: A threshold-based filtering algorithm for propagation delay and slew calculation of high-speed VLSI interconnects Proceedings of the Acm Great Lakes Symposium On Vlsi. 19-24.  0.683
2004 Shim H, Chang N, Pedram M. A compressed frame buffer to reduce display power consumption in mobile systems Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 819-824.  0.325
2003 Rong P, Pedram M. An analytical model for predicting the remaining battery capacity of lithium-ion batteries Proceedings -Design, Automation and Test in Europe, Date. 1148-1149. DOI: 10.1109/Tvlsi.2006.876094  0.526
2003 Heydari P, Pedram M. Ground bounce in digital VLSI circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 11: 180-193. DOI: 10.1109/Tvlsi.2003.810785  0.632
2003 Rezvani P, Pedram M. A Fanout Optimization Algorithm Based on the Effort Delay Model Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 22: 1671-1678. DOI: 10.1109/Tcad.2003.819423  0.805
2003 Kang CW, Pedram M. Technology mapping for low leakage power and high speed with hot-carrier effect consideration Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2003: 203-208. DOI: 10.1109/ASPDAC.2003.1195017  0.34
2003 Abbaspour S, Pedram M. Calculating the effective capacitance for the RC interconnect in VDSM technologies Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2003: 43-48. DOI: 10.1109/ASPDAC.2003.1194991  0.687
2003 Rong P, Pedram M. Extending the lifetime of a network of battery-powered mobile devices by remote processing: A Markovian decision-based approach Proceedings - Design Automation Conference. 906-911.  0.549
2002 Aghaghiri Y, Fallah F, Pedram M. A class of irredundant encoding techniques for reducing bus power Journal of Circuits, Systems and Computers. 11: 445-457. DOI: 10.1142/S0218126602000562  0.815
2002 Cheng WC, Pedram M. Power-aware bus encoding techniques for I/O and data buses in an embedded system Journal of Circuits, Systems and Computers. 11: 351-363. DOI: 10.1142/S0218126602000501  0.597
2002 Heydari P, Pedram M. Interconnect energy dissipation in high-speed ULSI circuits Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference On Vlsi Design, Asp-Dac/Vlsi Design 2002. 132-137. DOI: 10.1109/Tcsi.2004.832738  0.547
2002 Rong P, Pedram M. Battery-aware power management based on Markovian decision processes Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 707-713. DOI: 10.1109/Tcad.2005.855975  0.559
2002 Aghaghiri Y, Fallah F, Pedram M. ALBORZ: Address Level Bus Power Optimization Proceedings - International Symposium On Quality Electronic Design, Isqed. 2002: 470-475. DOI: 10.1109/ISQED.2002.996790  0.803
2002 Aghaghiri Y, Fallah F, Pedram M. EZ encoding: A class of irredundant low power codes for data address and multiplexed address buses Proceedings -Design, Automation and Test in Europe, Date. 1102. DOI: 10.1109/DATE.2002.998458  0.806
2002 Rezvani P, Pedram M. Concurrent and selective logic extraction with timing consideration Proceedings -Design, Automation and Test in Europe, Date. 1086. DOI: 10.1109/DATE.2002.998443  0.781
2002 Chen W, Pedram M, Buch P. Buffered routing tree construction under buffer placement blockages Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference On Vlsi Design, Asp-Dac/Vlsi Design 2002. 381-386. DOI: 10.1109/ASPDAC.2002.994951  0.356
2002 Cheng WC, Liang JL, Pedram M. Software-only bus encoding techniques for an embedded system Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference On Vlsi Design, Asp-Dac/Vlsi Design 2002. 126-131. DOI: 10.1109/ASPDAC.2002.994898  0.533
2002 Cheng WC, Pedram M. Power-optimal encoding for a DRAM address bus Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 10: 109-118. DOI: 10.1109/92.994988  0.606
2002 Salek AH, Lou J, Pedram M. Hierarchical buffered routing tree generation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 554-567. DOI: 10.1109/43.998627  0.787
2002 Heydari P, Abbaspour S, Pedram M. A comprehensive study of energy dissipation in lossy transmission lines driven by CMOS inverters Proceedings of the Custom Integrated Circuits Conference. 517-520.  0.745
2002 Wu XW, Lu YJ, Pedram M. Design of low power combinational circuits based on redundancy-restraining technique Tien Tzu Hsueh Pao/Acta Electronica Sinica. 30: 672-675.  0.354
2001 Cheng WC, Pedram M. Memory bus encoding for low power: A tutorial Proceedings - International Symposium On Quality Electronic Design, Isqed. 2001: 199-204. DOI: 10.1109/ISQED.2001.915227  0.543
2001 Hsieh CT, Chen LS, Pedram M. Microprocessor power analysis by labeled simulation Proceedings -Design, Automation and Test in Europe, Date. 182-189. DOI: 10.1109/DATE.2001.915022  0.32
2001 Ajami AH, Pedram M. Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2001: 595-600. DOI: 10.1109/ASPDAC.2001.913373  0.795
2001 Pedram M. Power optimization and management in embedded systems Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2001: 239-244. DOI: 10.1109/ASPDAC.2001.913312  0.311
2001 Heydari P, Pedram M. Balanced truncation with spectral shaping for RLC interconnects Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2001: 203-208. DOI: 10.1109/ASPDAC.2001.913305  0.55
2001 Qiu Q, Wu Q, Pedram M. Stochastic modeling of a power-managed system - Construction and optimization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 1200-1217. DOI: 10.1109/43.952737  0.648
2001 Wu Q, Qiu Q, Pedram M. Estimation of peak power dissipation in VLSI circuits using the limiting distributions of extreme order statistics Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 942-956. DOI: 10.1109/43.936376  0.692
2001 Oh J, Pedram M. Gated clock routing for low-power microprocessor design Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 715-722. DOI: 10.1109/43.924825  0.321
2001 Wu X, Pedram M. Low-power sequential circuit design using T flip-flops International Journal of Electronics. 88: 635-643. DOI: 10.1080/00207210110041506  0.433
2001 Heydari P, Pedram M. Jitter-induced power/ground noise in CMOS PLLs: A design perspective Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 209-213.  0.55
2001 Heydari P, Pedram M. Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 586-591.  0.564
2001 Heydari P, Pedram M. Analysis and reduction of capacitive coupling noise in high-speed VLSI circuits Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 104-109.  0.568
2001 Ajami AH, Banerjee K, Pedram M. Non-uniform chip-temperature dependent signal integrity Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 145-146.  0.779
2001 Ajami AH, Banerjee K, Pedram M. Analysis of substrate thermal gradient effects on optimal buffer insertion Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 44-48.  0.786
2001 Ajami AH, Pedram M, Banerjee K. Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs Proceedings of the Custom Integrated Circuits Conference. 233-236.  0.778
2001 Aghaghiri Y, Fallah F, Pedram M. Irredundant address bus encoding for low power Proceedings of the International Symposium On Low Power Electronics and Design, Digest of Technical Papers. 182-187.  0.813
2001 Banerjee K, Pedram M, Ajami AH. Analysis and optimization of thermal issues in high-performance VLSI Proceedings of the International Symposium On Physical Design. 230-237.  0.795
2000 Pedram M, Wu X. Analysis of power-clocked CMOS with application to the design of energy-recovery circuits Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 339-344. DOI: 10.1145/368434.368670  0.368
2000 Marculescu D, Marculescu R, Pedram M. Stochastic sequential machine synthesis with application to constrained sequence generation Acm Transactions On Design Automation of Electronic Systems. 5: 658-681. DOI: 10.1145/348019.348566  0.618
2000 Hsieh CT, Pedram M. Architectural power optimization by bus splitting Proceedings -Design, Automation and Test in Europe, Date. 612-616. DOI: 10.1109/DATE.2000.840848  0.322
2000 Ding CS, Hsieh CT, Pedram M. Improving the efficiency of Monte Carlo power estimation Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 8: 584-593. DOI: 10.1109/92.894163  0.38
2000 Marculescu D, Marculescu R, Pedram M. Theoretical bounds for switching activity analysis in finite-state machines Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 8: 335-339. DOI: 10.1109/92.845899  0.536
2000 Wu Q, Pedram M, Wu X. Clock-gating and its application to low power design of sequential circuits Ieee Transactions On Circuits and Systems I: Fundamental Theory and Applications. 47: 415-420. DOI: 10.1109/81.841927  0.496
2000 Cocchini P, Pedram M. Fanout optimization using bipolar LJ-trees Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 339-349. DOI: 10.1109/43.833202  0.302
2000 Chen W, Hsieh CT, Pedram M. Simultaneous gate sizing and placement Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 206-214. DOI: 10.1109/43.828549  0.427
2000 Wu X, Pedram M. Low power CMOS circuits with clocked power Ieee Asia-Pacific Conference On Circuits and Systems - Proceedings. 513-516.  0.344
1999 Pedram M, Wu Q. Battery-powered digital CMOS design Proceedings -Design, Automation and Test in Europe, Date. 72-76. DOI: 10.1109/DATE.1999.761099  0.385
1999 For A, Pedram M, Preas BT. Interconnection standard cell layouts Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 1512-1519. DOI: 10.1109/43.790628  0.345
1999 Salek AH, Lou J, Pedram M. An integrated logical and physical design flow for deep submicron circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 1305-1315. DOI: 10.1109/43.784122  0.793
1999 Xunwei W, Wu Q, Pedram M. Synchronous Derived Clock And Synthesis Of Low Power Sequential Circuits Journal of Electronics (China). 16: 138-145. DOI: 10.1007/S11767-999-1034-Y  0.578
1999 Wu X, Qiu Q, Pedram M. A synthesis methodology for ECL circuits based on mixed voltage-current representation Journal of Electronics (China). 16: 359-366. DOI: 10.1007/S11767-999-0038-Y  0.599
1998 Marculescu D, Marculescu R, Pedram M. Trace-driven steady-state probability estimation in FSMs with application to power estimation Proceedings -Design, Automation and Test in Europe, Date. 774-779. DOI: 10.1109/DATE.1998.655946  0.557
1998 Oh J, Pedram M. Gated clock routing minimizing the switched capacitance Proceedings -Design, Automation and Test in Europe, Date. 692-697. DOI: 10.1109/DATE.1998.655933  0.308
1998 Wu Q, Qiu Q, Pedram M, Ding C. Cycle-accurate macro-models for RT-level power analysis Ieee Transactions On Very Large Scale Integration Systems. 6: 520-528. DOI: 10.1109/92.736123  0.695
1998 Tsui CY, Pedram M, Despain AM. Low-power state assignment targeting two- and multilevel logic implementations Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 1281-1291. DOI: 10.1109/43.736568  0.427
1998 Ding CS, Tsui CY, Pedram M. Gate-level power estimation using tagged probabilistic simulation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 1099-1107. DOI: 10.1109/43.736184  0.322
1998 Macii E, Pedram M, Somenzi F. High-level power modeling, estimation, and optimization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 1061-1079. DOI: 10.1109/43.736181  0.33
1998 Marculescu R, Marculescu D, Pedram M. Probabilistic modeling of dependencies during switching activity analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 73-83. DOI: 10.1109/43.681258  0.624
1997 Pedram M, Bhat N, Kuh ES. Combining technology mapping with layout Vlsi Design. 5: 111-124. DOI: 10.1155/1997/73654  0.663
1997 Liu S, Pedram M, Despain AM. State assignment based on two-dimensional placement and hypercube mapping Integration, the Vlsi Journal. 24: 101-118. DOI: 10.1016/S0167-9260(97)00027-8  0.316
1997 Oh J, Pyo I, Pedram M. Constructing minimal spanning/Steiner trees with bounded path length Integration. 22: 137-163. DOI: 10.1016/S0167-9260(97)00009-6  0.342
1997 Pedram M, Vaishnav H. Power Optimization in VLSI Layout: A Survey Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 15: 221-232.  0.33
1996 Tsui C, Monteiro J, Pedram M, Devadas S, Despain AM, Lin B. Correction to "Power Estimation Methods for Sequential Logic Circuits" [Correspondence] Ieee Transactions On Very Large Scale Integration Systems. 4: 495. DOI: 10.1109/Tvlsi.1996.544414  0.392
1996 Lai Y, Pan K-R, Pedram M. OBDD-based function decomposition: algorithms and implementation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 15: 977-990. DOI: 10.1109/43.511577  0.326
1996 Iman S, Pedram M. An approach for multilevel logic optimization targeting low power Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 15: 889-901. DOI: 10.1109/43.511569  0.369
1996 Marculescu D, Marculescu R, Pedram M. Information theoretic measures for power analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 15: 599-610. DOI: 10.1109/43.503930  0.633
1996 Lai YT, Pedram M, Vrudhula SBK. Formal verification using edge-valued binary decision diagrams Ieee Transactions On Computers. 45: 247-255. DOI: 10.1109/12.485378  0.314
1996 Pedram M. Power minimization in 1c design: principles and applications Acm Transactions On Design Automation of Electronic Systems. 1: 3-56.  0.318
1995 Tsui C, Monteiro J, Pedram M, Devadas S, Despain AM, Lin B. Power estimation methods for sequential logic circuits Ieee Transactions On Very Large Scale Integration Systems. 3: 404-416. DOI: 10.1109/92.406998  0.398
1994 Pedram M, Nobandegani BS, Preas BT. Design and Analysis of Segmented Routing Channels for Row-Based FPGA's Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 13: 1470-1479. DOI: 10.1109/43.331404  0.335
1994 Tsui CY, Pedram M, Despain AM. Power Efficient Technology Decomposition and Mapping Under an Extended Power Consumption Model Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 13: 1110-1122. DOI: 10.1109/43.310900  0.434
1992 Pedram M, Kuh ES. Bear-Fp: A Robust Framework For Floorplanning International Journal of High Speed Electronics and Systems. 3: 137-170. DOI: 10.1142/S0129156492000060  0.665
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