Hojin Kee, Ph.D.
Affiliations: | 2010 | Electrical Engineering | University of Maryland, College Park, College Park, MD |
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"Hojin Kee"Parents
Sign in to add mentor| Shuvra S. Bhattacharyya | grad student | 2010 | University of Maryland | |
| (Systematic exploration of trade-offs between application throughput and hardware resource requirements in DSP systems.) | ||||
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Publications
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| Mhaske S, Kee H, Ly T, et al. (2017) FPGA-Based Channel Coding Architectures for 5G Wireless Using High-Level Synthesis International Journal of Reconfigurable Computing. 2017: 1-23 |
| Mhaske S, Kee H, Ly T, et al. (2016) High-throughput FPGA-based QC-LDPC decoder architecture 2015 Ieee 82nd Vehicular Technology Conference, Vtc Fall 2015 - Proceedings |
| Wu H, Shen C, Kee H, et al. (2014) Mapping Parameterized Dataflow Graphs onto FPGA Platforms Academic Press Library in Signal Processing. 4: 643-673 |
| Kee H, Shen CC, Bhattacharyya SS, et al. (2012) Mapping parameterized cyclo-static dataflow graphs onto configurable hardware Journal of Signal Processing Systems. 66: 285-301 |
| Sane N, Kee H, Seetharaman G, et al. (2011) Topological patterns for scalable representation and analysis of dataflow graphs Journal of Signal Processing Systems. 65: 229-244 |
| Sane N, Kee H, Seetharaman G, et al. (2010) Scalable representation of dataflow graph structures using topological patterns Ieee Workshop On Signal Processing Systems, Sips: Design and Implementation. 13-18 |
| Wu HH, Kee H, Sane N, et al. (2010) Rapid prototyping for digital signal processing systems using parameterized synchronous dataflow graphs Proceedings of the International Workshop On Rapid System Prototyping |
| Kee H, Bhattacharyya SS, Kornerup J. (2010) Efficient static buffering to guarantee throughput-optimal FPGA implementation of synchronous dataflow graphs Proceedings - 2010 International Conference On Embedded Computer Systems: Architectures, Modeling and Simulation, Ic-Samos 2010. 136-143 |
| Kee H, Bhattacharyya SS, Wong I, et al. (2010) FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 1510-1513 |
| Kee H, Bhattacharyya SS, Petersen N, et al. (2009) Resource-efficient acceleration of 2-dimensional Fast Fourier Transform computations on FPGAs 2009 3rd Acm/Ieee International Conference On Distributed Smart Cameras, Icdsc 2009 |