Michail Romesis, Ph.D.
Affiliations: | 2005 | University of California, Los Angeles, Los Angeles, CA |
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithmsGoogle:
"Michail Romesis"Parents
Sign in to add mentorJason Cong | grad student | 2005 | UCLA | |
(Automatic design planning and exploration of VLSI systems.) |
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Publications
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Cong J, Romesis M, Shinnerl JR. (2006) Fast floorplanning by look-ahead enabled recursive bipartitioning Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1719-1732 |
Cong J, Romesis M, Shinnerl JR. (2005) Robust mixed size placement under tight white space constraints Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 2005: 165-172 |
Chan TF, Cong J, Romesis M, et al. (2005) mPL6: A robust multilevel mixed-size placement engine Proceedings of the International Symposium On Physical Design. 227-229 |
Jagannathan A, Yang HH, Konigsfeld K, et al. (2005) Microarchitecture evaluation with floorplanning and interconnect pipelining Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 1: I8-I15 |
Chang CC, Cong J, Romesis M, et al. (2004) Optimality and Scalability Study of Existing Placement Algorithms Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 537-549 |
Cong J, Nataneli G, Romesis M, et al. (2004) An area-optimality study of floorplanning Proceedings of the International Symposium On Physical Design. 78-83 |
Cong J, Romesis M, Xie M. (2003) Optimality and stability study of timing-driven placement algorithms Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 472-478 |
Cong J, Jagannathan A, Reinman G, et al. (2003) Microarchitecture evaluation with physical planning Proceedings - Design Automation Conference. 32-35 |
Cong J, Romesis M, Xie M. (2003) Optimality, scalability and stability study of partitioning and placement algorithms Proceedings of the International Symposium On Physical Design. 88-94 |
Cong J, Romesis M. (2001) Performance-driven multi-level clustering with application to hierarchical FPGA mapping Proceedings - Design Automation Conference. 389-394 |