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Charles Zukowski

Affiliations: 
Electrical Engineering Columbia University, New York, NY 
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"Charles Zukowski"
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Shao-Yi Wang grad student 2001 Columbia
Shi H. Li grad student 2002 Columbia
Ali Bastani grad student 2006 Columbia

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Irez K, Hu J, Zukowski CA. (2010) Characteristics of MS-CMOS logic in sub-32nm technologies Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 393-396
Bastani A, Zukowski CA. (2006) A low-leakage high-speed monotonic static CMOS 64b adder in a dual gate oxide 65-nm CMOS technology Proceedings - International Symposium On Quality Electronic Design, Isqed. 312-317
Bastani A, Zukowski CA. (2006) Monotonic static CMOS tradeoffs in sub-100nm technologies Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 2006: 278-283
Chin P, Zukowski CA, Gristede GD, et al. (2005) Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies Integration, the Vlsi Journal. 38: 491-504
Bastani A, Zukowski CA. (2005) Characterization of monotonic static CMOS gates in a 65nm technology Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 408-411
Bastani A, Zukowski CA. (2004) Design of superbuffers in sub-100nm CMOS technologies with significant gate leakage Proceedings of the Acm Great Lakes Symposium On Vlsi. 119-122
Chin P, Zukowski CA, Gristede GD, et al. (2004) Characterization of logic circuit techniques for high leakage CMOS technologies Proceedings of the Acm Great Lakes Symposium On Vlsi. 230-235
Li SH, Zukowski CA. (2000) Application of dynamic power supply scaling in a low-energy ATM interface Proceedings - Ieee International Symposium On Circuits and Systems. 5: V-745-V-748
Tretz C, Chuang CT, Terman L, et al. (1999) Metastability of SOI CMOS latches International Journal of Electronics. 86: 807-813
Tretz C, Chuang CT, Terman L, et al. (1998) Performance comparison of differential static CMOS circuit topologies in SOI technology Ieee International Soi Conference. 123-124
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