Tiberiu Chelcea, Ph.D.
Affiliations: | 2004 | Columbia University, New York, NY |
Area:
Asynchronous and Mixed-Timing Digital Circuits and Systems, Computer-Aided Design, Networks-on-Chip, Interconnection Networks for Parallel Processors, Low-Power Digital DesignGoogle:
"Tiberiu Chelcea"Parents
Sign in to add mentor| Steven M. Nowick | grad student | 2004 | Columbia | |
| (Design and optimization of large-scale asynchronous and mixed -timing systems.) | ||||
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Publications
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| Chelcea T, Nowick SM. (2004) Robust interfaces for mixed-timing systems Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 857-873 |
| Chelcea T, Bardsley A, Edwards D, et al. (2002) A burst-mode oriented back-end for the Balsa synthesis system Proceedings -Design, Automation and Test in Europe, Date. 330-337 |
| Chelcea T, Nowick SM. (2002) Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems Proceedings - Design Automation Conference. 405-410 |
| Chelcea T, Nowick SM. (2001) Robust interfaces for mixed-timing systems with application to latency-insensitive protocols Proceedings - Design Automation Conference. 21-26 |
| Chelcea T, Nowick SM. (2000) A low-latency FIFO for mixed-clock systems Proceedings - Ieee Computer Society Workshop On Vlsi 2000: System Design For a System-On-Chip Era, Iwv 2000. 119-126 |
| Chelcea T, Nowick SM. (2000) Low-latency asynchronous FIFO's using token rings Proceedings - International Symposium On Asynchronous Circuits and Systems. 210-220 |