Jishen Zhao, Ph.D.
Affiliations: | 2014 | Computer Science and Engineering | Pennsylvania State University, State College, PA, United States |
Area:
Computer EngineeringGoogle:
"Jishen Zhao"Parents
Sign in to add mentorYuan Xie | grad student | 2014 | Penn State | |
(Rethinking the memory hierarchy design with nonvolatile memory technologies.) |
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Publications
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Yin S, Tang S, Lin X, et al. (2019) Parana: A Parallel Neural Architecture Considering Thermal Problem of 3D Stacked Memory Ieee Transactions On Parallel and Distributed Systems. 30: 146-160 |
Dai G, Huang T, Chi Y, et al. (2019) GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 640-653 |
Xie Y, Zhao J. (2019) Emerging Memory Technologies Ieee Micro. 39: 6-7 |
Sun G, Zhao J, Poremba M, et al. (2018) Memory that never forgets: emerging nonvolatile memory and the implication for architecture design National Science Review. 5: 577-592 |
Zhao J, Zou Q, Xie Y. (2017) Overview of 3-D Architecture Design Opportunities and Techniques Ieee Design & Test of Computers. 34: 60-68 |
Zhan J, Ouyang J, Ge F, et al. (2016) Hybrid Drowsy SRAM and STT-RAM Buffer Designs for Dark-Silicon-Aware NoC Ieee Transactions On Very Large Scale Integration (Vlsi) Systems |
Zhao J, Xu C, Zhang T, et al. (2016) BACH: A Bandwidth-Aware Hybrid Cache Hierarchy Design with Nonvolatile Memories Journal of Computer Science and Technology. 31: 20-35 |
Zhao J, Xu C, Chi P, et al. (2015) Memory and storage system design with nonvolatile memory technologies Ipsj Transactions On System Lsi Design Methodology. 8: 2-11 |
Zhao J, Li S, Chang J, et al. (2015) Buri: Scaling Big-Memory Computing with Hardware-Based Memory Expansion Acm Transactions On Architecture and Code Optimization. 12: 31 |
Zhao J, Sun G, Loh GH, et al. (2013) Optimizing gpu energy efficiency with 3d die-stacking graphics memory and reconfigurable memory interface Transactions On Architecture and Code Optimization. 10 |