Mesut Meterelliyoz, Ph.D.
Affiliations: | 2008 | Electrical and Computer Engineering | Purdue University, West Lafayette, IN, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Mesut Meterelliyoz"Parents
Sign in to add mentor| Kaushik Roy | grad student | 2008 | Purdue | |
| (Process variation and thermal aware circuit design and test for nanoscale technologies.) | ||||
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Publications
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| Hamzaoglu F, Arslan U, Bisnik N, et al. (2015) A 1 Gb 2 GHz 128 GB/s bandwidth embedded DRAM in 22 nm tri-gate CMOS technology Ieee Journal of Solid-State Circuits. 50: 150-157 |
| Hamzaoglu F, Arslan U, Bisnik N, et al. (2014) 13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 57: 230-231 |
| Karl E, Wang Y, Ng YG, et al. (2013) A 4.6 GHz 162 Mb SRAM design in 22 nm tri-gate CMOS technology with integrated read and write assist circuitry Ieee Journal of Solid-State Circuits. 48: 150-158 |
| Wang Y, Arslan U, Bisnik N, et al. (2013) Retention time optimization for eDRAM in 22nm tri-gate CMOS technology Technical Digest - International Electron Devices Meeting, Iedm. 9.5.1-9.5.4 |
| Wang Y, Karl E, Meterelliyoz M, et al. (2011) Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM Technical Digest - International Electron Devices Meeting, Iedm. 32.1.1-32.1.4 |
| Goel A, Ghosh S, Meterelliyoz M, et al. (2011) Integrated design & test: Conquering the conflicting requirements of low-power, variation-tolerance and test cost Proceedings of the Asian Test Symposium. 486-491 |
| Meterelliyoz M, Song P, Stellari F, et al. (2010) Characterization of random process variations using ultralow-power, high-sensitivity, bias-free sub-threshold process sensor Ieee Transactions On Circuits and Systems I: Regular Papers. 57: 1838-1847 |
| Meterelliyoz M, Kulkarni JP, Roy K. (2010) Analysis of SRAM and eDRAM cache memories under spatial temperature variations Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 29: 2-13 |
| Meterelliyoz M, Goel A, Kulkarni JP, et al. (2010) Accurate characterization of random process variations using a robust low-voltage high-sensitivity sensor featuring replica-bias circuit Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 53: 186-187 |
| Kanj R, Joshi R, Kuang JB, et al. (2009) Statistical yield analysis of silicon-on-insulator embedded DRAM Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 190-194 |