Won Namgoong

Affiliations: 
Electrical Engineering University of Southern California, Los Angeles, CA, United States 
 University of Texas at Dallas, Richardson, TX, United States 
 State University of New York, Albany, Albany, NY, United States 
Area:
Electronics and Electrical Engineering
Website:
https://www.albany.edu/ece/faculty/won-namgoong
Google:
"Won Namgoong"
Bio:

https://ieeexplore.ieee.org/author/37271204500
https://www.proquest.com/openview/186d403499f0b852d716a85ba5f549ff/1

Parents

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Teresa Meng grad student 1999 Stanford (Neurotree)
 (Fast and power -efficient synchronization of direct -sequence spread spectrum signals)

Children

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Kyongsu Lee grad student 2005 USC
Jongrit Lerdworatawee grad student 2005 USC
Ali Medi grad student 2007 USC (Physics Tree)
Sotirios Zogopoulos grad student 2007 USC
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Publications

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Bondalapati P, Namgoong W. (2019) Timing Jitter Distribution and Power Spectral Density of a Second-Order Bang–Bang Digital PLL With Transport Delay Using Fokker–Planck Equations Ieee Transactions On Very Large Scale Integration Systems. 27: 398-406
Torlak M, Namgoong W. (2018) Sub-Nyquist Sampling Receiver for Overlay Cognitive Radio Users Ieee Transactions On Signal Processing. 66: 4160-4169
Namgoong W. (2018) A Modified Proportional–Integral Loop Filter to Suppress DCO Noise in Digital PLL Ieee Transactions On Circuits and Systems Ii-Express Briefs. 65: 974-978
Babakrpur E, Namgoong W. (2018) Digital Cancellation of Harmonic and Intermodulation Distortion in Wideband SAW-Less Receivers Ieee Transactions On Circuits and Systems Ii-Express Briefs. 65: 1554-1558
Babakrpur E, Namgoong W. (2017) A Dual-Path 4-Phase Nonuniform Wideband Receiver With Digital MMSE Harmonic Rejection Equalizer Ieee Transactions On Microwave Theory and Techniques. 65: 386-395
Babakrpur E, Namgoong W. (2017) Matching for Concurrent Harmonic Sensing in an ${M}$ -Phase Mixer-First Receiver Ieee Transactions On Circuits and Systems Ii-Express Briefs. 64: 1017-1021
Namgoong W. (2016) An all-digital approach to supply noise cancellation in digital phase-locked loop Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 1025-1035
Ahmadi M, Namgoong W. (2015) Comparator Power Reduction in Low-Frequency SAR ADC Using Optimized Vote Allocation Ieee Transactions On Very Large Scale Integration Systems. 23: 2384-2394
Ahmadi M, Namgoong W. (2015) Comparator power minimization analysis for SAR ADC using multiple comparators Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 2369-2379
Ahmadi M, Namgoong W. (2015) Asynchronous SAR logic design using majority vote comparison for configurable SAR ADCs 2015 Ieee Dallas Circuits and Systems Conference: Enabling Technologies For a Connected World, Dcas 2015
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