Bahram Pouya, Ph.D.
Affiliations: | 2000 | University of Texas at Austin, Austin, Texas, U.S.A. |
Area:
Electronics and Electrical EngineeringGoogle:
"Bahram Pouya"Parents
Sign in to add mentor| Nur A. Touba | grad student | 2000 | UT Austin | |
| (Synthesis of testable core -based designs.) | ||||
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Publications
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| Jas A, Pouya B, Touba NA. (2004) Test data compression technique for embedded cores using virtual scan chains Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 775-780 |
| Sankaralingam R, Pouya B, Touba NA. (2001) Reducing power dissipation during test using scan chain disable Proceedings of the Ieee Vlsi Test Symposium. 319-324 |
| Pouya B, Touba NA. (1998) Synthesis of zero-aliasing elementary-tree space compactors Proceedings of the Ieee Vlsi Test Symposium. 70-77 |
| Touba NA, Pouya B. (1997) Using partial isolation rings to test core-based designs Ieee Design and Test of Computers. 14: 52-59 |