Sebastian Hoyos, Ph.D.
Affiliations: | 2004 | University of Delaware, Newark, DE, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Sebastian Hoyos"Parents
Sign in to add mentor| Gonzalo R. Arce | grad student | 2004 | University of Delaware | |
| (Mixed -signal high -speed processing solutions for broadband systems and technologies.) | ||||
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Publications
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| Tofighi Zavareh A, Hoyos S. (2019) Kalman-Based Real-Time Functional Decomposition for the Spectral Calibration in Swept Source Optical Coherence Tomography. Ieee Transactions On Biomedical Circuits and Systems |
| Kiran S, Shafik A, Tabasy EZ, et al. (2019) Modeling of ADC-Based Serial Link Receivers With Embedded and Digital Equalization Ieee Transactions On Components, Packaging and Manufacturing Technology. 9: 536-548 |
| Kiran S, Cai S, Luo Y, et al. (2019) A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS Ieee Journal of Solid-State Circuits. 54: 659-671 |
| Palermo S, Hoyos S, Cai S, et al. (2018) Analog-to-Digital Converter-Based Serial Links: An Overview Ieee Solid-State Circuits Magazine. 10: 35-47 |
| Zhou J, Zavareh AT, Gupta R, et al. (2017) Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices Ieee Transactions On Circuits and Systems I: Regular Papers. 64: 2495-2507 |
| Cai S, Tabasy EZ, Shafik A, et al. (2017) A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS Ieee Journal of Solid-State Circuits. 52: 2168-2179 |
| Cai S, Zhu Y, Kiran S, et al. (2017) Reference switching pre-emphasis-based successive approximation register ADC with enhanced DAC settling Electronics Letters. 53: 1352-1354 |
| Palermo S, Hoyos S, Shafik A, et al. (2016) CMOS ADC-based receivers for high-speed electrical and optical links Ieee Communications Magazine. 54: 168-175 |
| Qian H, Liu Q, Silva-Martinez J, et al. (2016) A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS Ieee Journal of Solid-State Circuits |
| Shafik A, Zhian Tabasy E, Cai S, et al. (2016) A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization Ieee Journal of Solid-State Circuits |