Ehsan Pakbaznia, Ph.D.
Affiliations: | 2010 | Electrical Engineering | University of Southern California, Los Angeles, CA, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Ehsan Pakbaznia"Parents
Sign in to add mentorMassoud Pedram | grad student | 2010 | USC | |
(Energy-efficient shutdown of circuit components and computing systems.) |
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Publications
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Pakbaznia E, Pedram M. (2012) Design of a tri-modal multi-threshold cmos switch with application to data retentive power gating Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 380-385 |
Mohyuddin N, Pakbaznia E, Pedram M. (2011) Probabilistic error propagation in a logic circuit using the boolean difference calculus Advanced Techniques in Logic Synthesis, Optimizations and Applications. 359-381 |
Ghasemazar M, Pakbaznia E, Pedram M. (2010) Minimizing the power consumption of a chip multiprocessor under an average throughput constraint Proceedings of the 11th International Symposium On Quality Electronic Design, Isqed 2010. 362-371 |
Ghasemazar M, Pakbaznia E, Pedram M. (2010) Minimizing energy consumption of a chip multiprocessor through simultaneous core consolidation and DVFS Iscas 2010 - 2010 Ieee International Symposium On Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 49-52 |
Pakbaznia E, Ghasemazar M, Pedram M. (2010) Temperature-aware dynamic resource provisioning in a power-optimized datacenter Proceedings -Design, Automation and Test in Europe, Date. 124-129 |
Pakbaznia E, Pedram M. (2009) Minimizing data center cooling and server power costs Proceedings of the International Symposium On Low Power Electronics and Design. 145-150 |
Pakbaznia E, Pedram M. (2009) Design and application of multimodal power gating structures Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 120-126 |
Pakbaznia E, Fallah F, Pedram M. (2008) Charge recycling in power-gated CMOS circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1798-1811 |
Mohyuddin N, Pakbaznia E, Pedram M. (2008) Probabilistic error propagation in logic circuits using the boolean difference calculus 26th Ieee International Conference On Computer Design 2008, Iccd. 7-13 |
Pakbaznia E, Pedram M. (2008) Coarse-grain MTCMOS sleep transistor sizing using delay budgeting Proceedings -Design, Automation and Test in Europe, Date. 385-390 |