Satyendra R. Datla, Ph.D.
Affiliations: | 2009 | Computer Science and Engineering | Southern Methodist University, Dallas, TX, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Satyendra Datla"Parents
Sign in to add mentorMitchell A. Thornton | grad student | 2009 | SMU | |
(Design and validation of quaternary arithmetic circuits.) |
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Publications
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Rithe R, Chou S, Gu J, et al. (2012) The effect of random dopant fluctuations on logic timing at low voltage Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 911-924 |
Datla SR, Thornton MA, Hendrix L, et al. (2009) Quaternary addition circuits based on SUSLOC voltage-mode cells and modeling with system verilog© Proceedings of the International Symposium On Multiple-Valued Logic. 256-261 |
Datla SR, Thornton MA, Matula DW. (2009) A low power high performance radix-4 approximate squaring circuit Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 91-97 |