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Dawid M. Zydek, Ph.D.

Affiliations: 
2010 Electrical Engineering University of Nevada, Las Vegas, Las Vegas, NV, United States 
Area:
Computer Engineering
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"Dawid Zydek"
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Henry Selvaraj grad student 2010 University of Nevada, Las Vegas
 (Processor allocator for Chip MultiProcessors.)

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Publications

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Zydek D, Chmaj G, Chiu S. (2013) Modeling computational limitations in H-Phy and Overlay-NoC architectures The Journal of Supercomputing. 70: 301-320
Borowik G, Łuba T, Zydek D. (2012) Features Reduction Using Logic Minimization Techniques International Journal of Electronics and Telecommunications. 58: 71-76
Zydek D, Chmaj G, Shawky A, et al. (2012) Location of Processor Allocator and Job Scheduler and its Impact on CMP Performance International Journal of Electronics and Telecommunications. 58: 9-14
Zydek D, Selvaraj H, Borowik G, et al. (2011) Energy characteristic of a processor allocator and a network-on-chip International Journal of Applied Mathematics and Computer Science. 21: 385-399
Zydek D, Selvaraj H. (2011) Fast and efficient processor allocation algorithm for torus-based chip multiprocessors Computers & Electrical Engineering. 37: 91-105
Zydek D, Selvaraj H, Koszałka L, et al. (2010) Evaluation Scheme for NoC based CMP with Integrated Processor Management System International Journal of Electronics and Telecommunications. 56: 157-168
Zydek D, Selvaraj H. (2010) Hardware implementation of processor allocation schemes for mesh-based chip multiprocessors Microprocessors and Microsystems. 34: 39-48
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