Archana Devasia, Ph.D.
Affiliations: | 2011 | Microsystems Engineering | Rochester Institute of Technology, Rochester, NY, United States |
Area:
Electronics and Electrical Engineering, Materials Science EngineeringGoogle:
"Archana Devasia"Parents
Sign in to add mentor| Santosh K. Kurinec | grad student | 2011 | Rochester Institute of Technology | |
| (Towards integrating chalcogenide based phase change memory with silicon microelectronics.) | ||||
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Publications
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| Devasia A, MacMahon D, Raoux S, et al. (2012) Investigation of inter-diffusion in bilayer GeTe/SnSe phase change memory films Thin Solid Films. 520: 3931-3935 |
| Josan GS, Devasia A, Rommel S, et al. (2011) Simulation and verification of void transfer patterning (VTP) technique for nm-scale features Microelectronic Engineering. 88: 53-59 |
| Devasia A, Kurinec S, Campbell KA, et al. (2010) Influence of Sn Migration on phase transition in GeTe and Ge2 Se3 thin films Applied Physics Letters. 96 |
| Devasia A, Bai F, Davis M, et al. (2009) Analyzing residual stress in bilayer chalcogenide Ge2Se3/SnTe films Thin Solid Films. 517: 6516-6519 |
| Bai F, Gupta S, Devasia A, et al. (2008) Investigation of phase transition in stacked ge-chalcogenide/snte phase-change memory films Materials Research Society Symposium Proceedings. 1056: 313-318 |