Masoud Zamani, Ph.D.
Affiliations: | 2013 | Electrical and Computer Engineering | Northeastern University, Boston, MA, United States |
Area:
Computer Engineering, Electronics and Electrical EngineeringGoogle:
"Masoud Zamani"Parents
Sign in to add mentor| Mehdi B. Tahoori | grad student | 2013 | Northeastern University | |
| (Robust Design Techniques for Emerging Technologies of Computing.) | ||||
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Publications
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| Zamani M, Mirzaei H, Tahoori MB. (2013) ILP formulations for variation/defect-tolerant logic mapping on crossbar nano-architectures Acm Journal On Emerging Technologies in Computing Systems. 9 |
| Zamani M, Tahoori MB. (2012) Reliable logic mapping on nano-PLA architectures Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 107-110 |
| Zamani M, Tahoori MB. (2011) Variation-immune quasi delay-insensitive implementation on nano-crossbar arrays Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 181-186 |
| Zamani M, Tahoori MB. (2011) Self-timed nano-PLA Proceedings of the 2011 Ieee/Acm International Symposium On Nanoscale Architectures, Nanoarch 2011. 78-85 |
| Zamani M, Tahoori MB. (2011) Online missing/repeated gate faults detection in reversible circuits Proceedings - Ieee International Symposium On Defect and Fault Tolerance in Vlsi Systems. 435-442 |
| Zamani M, Tahoori MB. (2011) Variation-aware logic mapping for crossbar nano-architectures Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 317-322 |
| Zamani M, Tahoori MB. (2010) A transient error tolerant self-timed asynchronous architecture 2010 15th Ieee European Test Symposium, Ets'10. 88-93 |