Sunderarajan S. Mohan, Ph.D.
Affiliations: | 2000 | Stanford University, Palo Alto, CA |
Area:
Electronics and Electrical Engineering, Electricity and Magnetism PhysicsGoogle:
"Sunderarajan Mohan"Parents
Sign in to add mentor| Thomas H. Lee | grad student | 2000 | Stanford | |
| (The design, modeling and optimization of on -chip inductor and transformer circuits.) | ||||
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Publications
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| Mohan SS, Chan WS, Colleran DM, et al. (2005) Differential ring oscillators with multipath delay stages Proceedings of the Custom Integrated Circuits Conference. 2005: 498-501 |
| Colleran DM, Portmann C, Hassibi A, et al. (2003) Optimization of phase-locked loop circuits via geometric programming Proceedings of the Custom Integrated Circuits Conference. 377-380 |
| Mohan SS, Del Mar Hershenson M, Boyd SP, et al. (2000) Bandwidth extension in CMOS with optimized on-chip inductors Ieee Journal of Solid-State Circuits. 35: 346-355 |
| Mohan SS, Hershenson MDM, Boyd SP, et al. (1999) Simple accurate expressions for planar spiral inductances Ieee Journal of Solid-State Circuits. 34: 1419-1420 |
| Shahani AR, Shaeffer DK, Mohan SS, et al. (1998) Low-power dividerless frequency synthesis using aperture phase detection Ieee Journal of Solid-State Circuits. 33: 2232-2239 |
| Shaeffer DK, Shahani AR, Mohan SS, et al. (1998) A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters Ieee Journal of Solid-State Circuits. 33: 2219-2230 |