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Sivakumar P. Mudanai, Ph.D.

Affiliations: 
2001 University of Texas at Austin, Austin, Texas, U.S.A. 
Area:
Electronics and Electrical Engineering
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"Sivakumar Mudanai"
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Sanjay K. Banerjee grad student 2001 UT Austin
 (Gate current modeling through high -K materials and compact modeling of gate capacitance.)

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Publications

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Kotlyar R, Giles MD, Mudanai SP, et al. (2010) Compressive uniaxial stress bandstructure engineering for transferred-hole devices Ieee Electron Device Letters. 31: 878-880
Li F, Mudanai SP, Fan YY, et al. (2006) Physically based quantum - Mechanical compact model of MOS devices substrate-injected tunneling current through ultrathin (EOT ∼ 1nm) SiO2 and high-k gate stacks Ieee Transactions On Electron Devices. 53: 1096-1106
Li F, Mudanai SP, Fan YY, et al. (2003) Compact model of MOSFET electron tunneling current through ultra-thin SiO<inf>2</inf> and high-k gate stacks Device Research Conference - Conference Digest, Drc. 2003: 47-48
Li F, Mudanai SP, Fan YY, et al. (2003) A simulated annealing approach for automatic extraction of device and material parameters of MOS with SiO2/high-K gate stacks Biennial University/Government/Industry Microelectronics Symposium - Proceedings. 218-221
Mudanai S, Li F, Samavedam SB, et al. (2002) Interfacial defect states in HfO2 and ZrO2 nMOS capacitors Ieee Electron Device Letters. 23: 728-730
Mudanai S, Register LF, Tasch AF, et al. (2001) Understanding the effects of wave function penetration on the inversion layer capacitance of NMOSFETs Ieee Electron Device Letters. 22: 145-147
Ouyang Q, Chen X, Mudanai SP, et al. (2000) A novel Si/SiGe heterojunction pMOSFET with reduced short-channel effects and enhanced drive current Ieee Transactions On Electron Devices. 47: 1943-1949
Mudanai S, Fan YY, Ouyang Q, et al. (2000) Modeling of direct tunneling current through gate dielectric stacks Ieee Transactions On Electron Devices. 47: 1851-1857
Kencke DL, Ouyang Q, Chen W, et al. (2000) Tinkering with the well-tempered MOSFET: Source-channel barrier modulation with high-permittivity dielectrics Superlattices and Microstructures. 27: 207-214
Mudanai S, Chindalore GL, Shih W-, et al. (1999) Models for electron and hole mobilities in MOS accumulation layers Ieee Transactions On Electron Devices. 46: 1749-1759
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