Rouwaida Kanj, Ph.D.

Affiliations: 
2004 University of Illinois, Urbana-Champaign, Urbana-Champaign, IL 
Area:
Electronics and Electrical Engineering
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"Rouwaida Kanj"

Parents

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Elyse Rosenbaum grad student 2004 UIUC
 (SOI circuit design styles and high-level circuit modeling techniques.)
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Publications

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Safieddine MH, Zaraket FA, Kanj R, et al. (2019) Verification at RTL Using Separation of Design Concerns Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1529-1542
Malik M, Joshi RV, Kanj R, et al. (2018) Sparse Regression Driven Mixture Importance Sampling for Memory Design Ieee Transactions On Very Large Scale Integration Systems. 26: 63-72
Joshi R, Saroop S, Kanj R, et al. (2016) A universal hardware-driven PVT and layout-aware predictive failure analytics for SRAM Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 968-978
Wang F, Cachecho P, Zhang W, et al. (2016) Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 1255-1268
Safieddine MH, Zaraket FA, Jaber M, et al. (2016) Automated FPGA implementations of BIP designs 2016 11th Ieee International Symposium On Industrial Embedded Systems, Sies 2016 - Proceedings
Shaer L, Sakakini T, Kanj R, et al. (2016) A low power reconfigurable LFSR Proceedings of the 18th Mediterranean Electrotechnical Conference: Intelligent and Efficient Technologies and Services For the Citizen, Melecon 2016
Joshi RV, Kanj R. (2015) Corrections to “Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction” Ieee Transactions On Very Large Scale Integration (Vlsi) Systems
Joshi RV, Kim K, Kanj R, et al. (2015) Super fast physics-based methodology for accurate memory yield prediction Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 534-543
Joshi R, Kanj R. (2015) Designing stable circuits in the world of instability Proceedings of the 2015 Ieee International Conference On Electron Devices and Solid-State Circuits, Edssc 2015. 265-268
Joshi RV, Kanj R, Saroop S. (2014) Novel 4 GHz interleaved SRAM cells with asymmetrical precharge in 45 nm PDSOI technology Ieee Transactions On Semiconductor Manufacturing. 27: 278-286
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