Seong-Ook Jung, Ph.D.

Affiliations: 
2002 University of Illinois, Urbana-Champaign, Urbana-Champaign, IL 
Area:
Electronics and Electrical Engineering
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"Seong-Ook Jung"

Parents

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Steve Kang grad student 2002 UIUC
 (Low-power high-performance dynamic circuit design for ultra-deep submicron technology.)
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Publications

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Park J, Oh TW, Jung S. (2020) pMOS Pass Gate Local Bitline SRAM Architecture With Virtual $V_{\mathrm{SS}}$ for Near-Threshold Operation Ieee Transactions On Very Large Scale Integration Systems. 28: 1079-1083
Lim S, Song B, Jung S. (2020) Highly Independent MTJ-Based PUF System Using Diode-Connected Transistor and Two-Step Postprocessing for Improved Response Stability Ieee Transactions On Information Forensics and Security. 15: 2798-2807
Yoon NA, Jung SJ, Choi SH, et al. (2019) DRG2 supports the growth of primary tumors and metastases of melanoma by enhancing VEGF-A expression. The Febs Journal
Na T, Song B, Choi S, et al. (2019) Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS Ieee Transactions On Very Large Scale Integration Systems. 27: 2548-2555
Kim SM, Song B, Jung S. (2019) Sensing Margin Enhancement Technique Utilizing Boosted Reference Voltage for Low-Voltage and High-Density DRAM Ieee Transactions On Very Large Scale Integration Systems. 27: 2413-2422
Ko J, Yang Y, Kim J, et al. (2019) Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory Ieee Transactions On Very Large Scale Integration Systems. 27: 1828-1839
Park HK, Choi TH, Ahn HK, et al. (2019) Thermoelectric Cooling Read for Resolving Read Disturb With Inrush Current Issue in OTS-PRAM Ieee Transactions On Nanotechnology. 18: 421-431
Choi TH, Oh TW, Jung S. (2019) Parasitic $RC$ Aware Delay Corner Model for Sub-10-nm Logic Circuit Design Ieee Transactions On Electron Devices. 66: 191-199
Song B, Choi S, Kang SH, et al. (2019) Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 2963-2972
Jeong H, Park J, Song SC, et al. (2019) Self-Timed Pulsed Latch for Low-Voltage Operation With Reduced Hold Time Ieee Journal of Solid-State Circuits. 54: 2304-2315
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