Byron Ho, Ph.D.
Affiliations: | 2012 | Electrical Engineering & Computer Sciences | University of California, Berkeley, Berkeley, CA, United States |
Area:
NanofabricationGoogle:
"Byron Ho"Mean distance: 17.34
Parents
Sign in to add mentorTsu-Jae King Liu | grad student | 2012 | UC Berkeley | |
(Evolutionary MOSFET Structure and Channel Design for Nanoscale CMOS Technology.) |
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Publications
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Ho B, Xu N, Wood B, et al. (2013) Fabrication of $\hbox{Si}_{1 - x}\hbox{Ge}_{x}/\hbox{Si}$ pMOSFETs Using Corrugated Substrates for Improved $I_{\rm ON}$ and Reduced Layout-Width Dependence Ieee Transactions On Electron Devices. 60: 153-158 |
Ho B, Sun X, Shin C, et al. (2013) Design Optimization of Multigate Bulk MOSFETs Ieee Transactions On Electron Devices. 60: 28-33 |
Ho B, Sun X, Xu N, et al. (2012) First Demonstration of Quasi-Planar Segmented-Channel MOSFET Design for Improved Scalability Ieee Transactions On Electron Devices. 59: 2273-2276 |
Matheu P, Ho B, Jacobson ZA, et al. (2012) Planar GeOI TFET performance improvement with back biasing Ieee Transactions On Electron Devices. 59: 1629-1635 |
Xu N, Ho B, Choi M, et al. (2012) Effectiveness of stressors in aggressively scaled FinFETs Ieee Transactions On Electron Devices. 59: 1592-1598 |
Ho B, Xu N, Liu TK. (2012) pMOSFET Performance Enhancement With Strained Channels Ieee Transactions On Electron Devices. 59: 1468-1474 |
Xu N, Ho B, Andrieu F, et al. (2012) Carrier-Mobility Enhancement via Strain Engineering in Future Thin-Body MOSFETs Ieee Electron Device Letters. 33: 318-320 |
Ho B, Xu N, Liu TK. (2011) Study of High-Performance Ge pMOSFET Scaling Accounting for Direct Source-to-Drain Tunneling Ieee Transactions On Electron Devices. 58: 2895-2902 |
Ho B, Vega R, King-Liu T. (2010) Study of Germanium Epitaxial Recrystallization on Bulk-Si Substrates Mrs Proceedings. 1252 |
Lee D, Tran H, Ho B, et al. (2010) Electrical Characterization of Etch Rate for Micro- and Nano-Scale Gap Formation Ieee\/Asme Journal of Microelectromechanical Systems. 19: 1260-1263 |