James W. Joyner, Ph.D.
Affiliations: | 2003 | Georgia Institute of Technology, Atlanta, GA |
Area:
Microelectronics/MicrosystemsGoogle:
"James Joyner"Mean distance: 20.07
Parents
Sign in to add mentor| James D. Meindl | grad student | 2003 | Georgia Tech | |
| (Opportunities and limitations of three -dimensional integration for interconnect design.) | ||||
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Publications
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| Joyner JW, Zarkesh-Ha P, Meindl JD. (2004) Global interconnect design in a three-dimensional system-on-a-chip Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 367-372 |
| Joyner JW, Venkatesan R, Davis JA, et al. (2003) The limits of system improvement through liquid diagonal routing of interconnects Proceedings of the Ieee 2003 International Interconnect Technology Conference, Iitc 2003. 227-229 |
| Joyner JW, Meindl JD. (2002) Opportunities for reduced power dissipation using three-dimensional integration Proceedings of the Ieee 2002 International Interconnect Technology Conference, Iitc 2002. 148-150 |
| Joyner JW, Meindl JD. (2002) A compact model for projections of future power supply distribution network requirements Proceedings of the Annual Ieee International Asic Conference and Exhibit. 2002: 376-380 |
| Joyner JW, Venkatesan R, Zarkesh-Ha P, et al. (2001) Impact of three-dimensional architectures on interconnects in gigascale integration Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 9: 922-928 |
| Joyner JW, Zarkesh-Ha P, Meindl JD. (2001) A stochastic global net-length distribution for a three-dimensional system-on-a-chip (3D-SoC) Proceedings of the Annual Ieee International Asic Conference and Exhibit. 147-151 |
| Meindl JD, Venkatesan R, Davis JA, et al. (2001) Interconnecting device opportunities for gigascale integration (GSI) Technical Digest - International Electron Devices Meeting. 525-528 |
| Joyner JW, Zarkesh-Ha P, Davis JA, et al. (2000) A three-dimensional stochastic wire-length distribution for variable separation of strata Proceedings of the Ieee 2000 International Interconnect Technology Conference, Iitc 2000. 126-128 |
| Joyner JW, Zarkesh-Ha P, Davis JA, et al. (2000) Vertical pitch limitations on performance enhancement in bonded three-dimensional interconnect architectures International Workshop On System-Level Interconnect Prediction (Slip 2000). 123-127 |