Girish Venkataramani, Ph.D.

Affiliations: 
2007 Carnegie Mellon University, Pittsburgh, PA 
Area:
Electronics and Electrical Engineering, Computer Science
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"Girish Venkataramani"

Parents

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Seth C. Goldstein grad student 2007 Carnegie Mellon
 (System -level timing analysis and optimizations for hardware compilation.)
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Publications

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Chen J, Yao F, Venkataramani G. (2013) Watts-inside: A hardware-software cooperative approach for Multicore Power Debugging 2013 Ieee 31st International Conference On Computer Design, Iccd 2013. 335-342
Venkataramani G, Hughes CJ, Kumar S, et al. (2011) DeFT: Design space exploration for on-the-fly detection of coherence misses Transactions On Architecture and Code Optimization. 8
Kannan H, Budiu M, Davis JD, et al. (2009) Tuning SoCs using the global dynamic critical path Proceedings - Ieee International Soc Conference, Socc 2009. 407-411
Venkataramani G, Goldstein SC. (2008) Slack analysis in the system design loop Embedded Systems Week 2008 - Proceedings of the 6th Ieee/Acm/Ifip International Conference On Hardware/Software Codesign and System Synthesis, Codes+Isss 2008. 231-236
Biswas P, Venkataramani G. (2008) Comprehensive isomorphic subtree enumeration Embedded Systems Week 2008 - Proceedings of the 2008 International Conference On Compilers, Architecture and Synthesis For Embedded Systems, Cases'08. 177-185
Venkataramani G, Doudalis I, Solihin Y, et al. (2008) FlexiTaint: A programmable accelerator for dynamic taint propagation Proceedings - International Symposium On High-Performance Computer Architecture. 173-184
Venkataramani G, Chelcea T, Goldstein SC. (2008) Heterogeneous latch-based asynchronous pipelines Proceedings - International Symposium On Asynchronous Circuits and Systems. 83-92
Venkataramani G, Goldstein SC. (2007) Operation chaining asynchronous pipelined circuits Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 442-449
Chelcea T, Venkataramani G, Goldstein SC. (2007) Self-resetting latches for asynchronous micro-pipelines Proceedings - Design Automation Conference. 986-989
Venkataramani G, Budiu M, Chelcea T, et al. (2007) Global critical path: A tool for system-level timing analysis Proceedings - Design Automation Conference. 783-786
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