Parents
Sign in to add mentor| Alain Greiner | grad student | 1991 | UPMC Univ Paris 6 | |
| (Des architectures vlsi pipelines pour les algorithmes numeriques a flots de donnees en representations arithmetiques virgule fixe et virgule flottante) | ||||
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Publications
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| Chtourou S, Marrakchi Z, Amouri E, et al. (2017) Performance analysis and optimization of cluster-based mesh FPGA architectures: design methodology and CAD tool support Turkish Journal of Electrical Engineering and Computer Sciences. 25: 2044-2054 |
| Chtourou S, Abid M, Marrakchi Z, et al. (2016) Design of advanced 2D and 3D FPGAs: Architecture-level exploration and algorithm-level optimization Intelligent Decision Technologies. 31-36 |
| Chtourou S, Marrakchi Z, Amouri E, et al. (2016) Improvement of cluster-based Mesh FPGA architecture using novel hierarchical interconnect topology and long routing wires Microprocessors and Microsystems. 40: 16-26 |
| Pangracious V, Marrakchi Z, Mehrez H. (2015) Design and Optimization of a Horizontally Partitioned, High-Speed, 3D Tree-Based FPGA Ieee Micro. 35: 48-59 |
| Belhadj N, Bahri N, Marrakchi Z, et al. (2015) H.264/AVC high definition intra coding implementation on multiprocessor system on chip technology architecture Iet Computers and Digital Techniques. 9: 259-267 |
| Turki M, Marrakchi Z, Mehrez H, et al. (2015) Signal multiplexing approach to improve inter-FPGA bandwidth of prototyping platform Design Automation For Embedded Systems. 19: 223-242 |
| Belhadj N, Marrakchi Z, Ayed MAB, et al. (2014) MPSoC Architecture for Macro Blocks Line Partitioning of H.264/AVC Encoder International Journal of Embedded and Real-Time Communication Systems. 5: 57-74 |
| Abdellatif KMA, Chotin-Avot R, Mehrez H. (2014) Low cost Solutions for Secure Remote Reconfiguration of FPGAs International Journal of Embedded Systems. 6: 257-265 |
| Kilic A, Marrakchi Z, Mehrez H. (2014) A top-down optimization methodology for mutually exclusive applications International Journal of Reconfigurable Computing. 2014: 3 |
| Ouattara B, Doyen L, Ney D, et al. (2014) Power grid redundant path contribution in system on chip (SoC) robustness against electromigration Microelectronics Reliability. 54: 1702-1706 |