☰

Sudhakar Yalamanchili - Publications

Affiliations: 
Georgia Institute of Technology, Atlanta, GA 
Area:
Electronics and Electrical Engineering, Computer Science
Tree Info Similar researchers PubMed Report error

81 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Asgari B, Mukhopadhyay S, Yalamanchili S. MAHASIM: Machine-Learning Hardware Acceleration Using a Software-Defined Intelligent Memory System Journal of Signal Processing Systems. 1-17. DOI: 10.1007/S11265-019-01505-1  0.396
2019 Mukhopadhyay S, Long Y, Mudassar BA, Nair CS, DeProspo BH, Torun HM, Kathaperumal M, Smet V, Kim D, Yalamanchili S, Swaminathan M. Heterogeneous integration for artificial intelligence: Challenges and opportunities Journal of Reproduction and Development. 63. DOI: 10.1147/Jrd.2019.2947373  0.42
2019 Asgari B, Hadidi R, Kim H, Yalamanchili S. ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays Ieee Micro. 39: 46-54. DOI: 10.1109/Mm.2019.2930057  0.309
2018 Kim D, Na T, Yalamanchili S, Mukhopadhyay S. DeepTrain: A Programmable Embedded Platform for Training Deep Neural Networks Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 2360-2370. DOI: 10.1109/Tcad.2018.2858358  0.388
2018 Chen X, Xiao H, Wardi Y, Yalamanchili S. On-line Optimization of Power Efficiency in 3D Multicore Processors Ifac-Papersonline. 51: 127-132. DOI: 10.1016/J.Ifacol.2018.06.290  0.428
2018 Chen X, Wardi Y, Yalamanchili S. Instruction-throughput regulation in computer processors with data-center applications Discrete Event Dynamic Systems. 28: 127-158. DOI: 10.1007/S10626-017-0254-9  0.465
2017 Yueh W, Wan Z, Xiao H, Yalamanchili S, Joshi Y, Mukhopadhyay S. Active Fluidic Cooling on Energy Constrained System-on-Chip Systems Ieee Transactions On Components, Packaging and Manufacturing Technology. 7: 1813-1822. DOI: 10.1109/Tcpmt.2017.2746667  0.405
2016 Wang J, Dong Z, Yalamanchili S, Riley G. FNM: An enhanced null-message algorithm for parallel simulation of multicore systems Acm Transactions On Modeling and Computer Simulation. 26. DOI: 10.1145/2735630  0.422
2016 Chen X, Wardi Y, Yalamanchili S. IPA in the loop: Control design for throughput regulation in computer processors 2016 13th International Workshop On Discrete Event Systems, Wodes 2016. 141-146. DOI: 10.1109/WODES.2016.7497839  0.304
2016 Xiao H, Yueh W, Mukhopadhyay S, Yalamanchili S. Thermally Adaptive Cache Access Mechanisms for 3D Many-Core Architectures Ieee Computer Architecture Letters. 15: 129-132. DOI: 10.1109/Lca.2015.2495125  0.407
2016 Song WJ, Mukhopadhyay S, Yalamanchili S. Amdahl's law for lifetime reliability scaling in heterogeneous multicore processors Proceedings - International Symposium On High-Performance Computer Architecture. 2016: 594-605. DOI: 10.1109/HPCA.2016.7446097  0.316
2016 Wardi Y, Seatzu C, Chen X, Yalamanchili S. Performance regulation of event-driven dynamical systems using infinitesimal perturbation analysis Nonlinear Analysis: Hybrid Systems. 22: 116-136. DOI: 10.1016/J.Nahs.2016.03.007  0.429
2015 Wang J, Rubin N, Sidelnik A, Yalamanchili S. Dynamic thread block launch: A lightweight execution mechanism to support irregular applications on GPUs Proceedings - International Symposium On Computer Architecture. 13: 528-540. DOI: 10.1145/2749469.2750393  0.447
2015 Saeed I, Young J, Yalamanchili S. A portable benchmark suite for highly parallel data intensive query processing 2nd Workshop On Parallel Programming For Analytics Applications, Ppaa 2015 - Proceedings. 31-38. DOI: 10.1145/2726935.2726943  0.342
2015 Xiao H, Yueh W, Mukhopadhyay S, Yalamanchili S. Multi-Physics driven co-Design of 3D multicore architectures Asme 2015 International Technical Conference and Exhibition On Packaging and Integration of Electronic and Photonic Microsystems, Interpack 2015, Collocated With the Asme 2015 13th International Conference On Nanochannels, Microchannels, and Minichannels. 1. DOI: 10.1115/IPACK2015-48533  0.314
2015 Song WJ, Mukhopadhyay S, Yalamanchili S. KitFox: Multiphysics Libraries for Integrated Power, Thermal, and Reliability Simulations of Multicore Microarchitecture Ieee Transactions On Components, Packaging and Manufacturing Technology. 5: 1590-1601. DOI: 10.1109/Tcpmt.2015.2485158  0.411
2015 Song W, Mukhopadhyay S, Yalamanchili S. Architectural Reliability: Lifetime Reliability Characterization and Management of Many-Core Processors Ieee Computer Architecture Letters. 14: 103-106. DOI: 10.1109/Lca.2014.2340873  0.385
2015 Song WJ, Mukhopadhyay S, Yalamanchili S. Managing performance-reliability tradeoffs in multicore processors Ieee International Reliability Physics Symposium Proceedings. 2015: 3C11-3C17. DOI: 10.1109/IRPS.2015.7112707  0.324
2015 Anger E, Yalamanchili S, Dechev D, Hendry G, Wilke J. Application modeling for scalable simulation of massively parallel systems Proceedings - 2015 Ieee 17th International Conference On High Performance Computing and Communications, 2015 Ieee 7th International Symposium On Cyberspace Safety and Security and 2015 Ieee 12th International Conference On Embedded Software and Systems, Hpcc-Css-Icess 2015. 238-247. DOI: 10.1109/HPCC-CSS-ICESS.2015.286  0.397
2015 Joshi Y, Barabadi B, Ghosh R, Wan Z, Xiao H, Yalamanchili S, Kumar S. Thermal simulations in support of multi-scale co-design of energy efficient information technology systems International Journal of Numerical Methods For Heat and Fluid Flow. 25: 1385-1403. DOI: 10.1108/Hff-08-2014-0242  0.377
2015 Wan Z, Xiao H, Joshi Y, Yalamanchili S. Co-design of multicore architectures and microfluidic cooling for 3D stacked ICs Microelectronics Journal. 45: 1814-1821. DOI: 10.1016/J.Mejo.2014.04.019  0.412
2014 Lim J, Lakshminarayana NB, Kim H, Song W, Yalamanchili S, Sung W. Power modeling for GPU architectures using McPAT Acm Transactions On Design Automation of Electronic Systems. 19. DOI: 10.1145/2611758  0.34
2014 Farooqui N, Schwan K, Yalamanchili S. Efficient instrumentation of GPGPU applications using information flow analysis and symbolic execution Acm International Conference Proceeding Series. 19-27. DOI: 10.1145/2576779.2576782  0.405
2014 Wu H, Diamos G, Sheard T, Aref M, Baxter S, Garland M, Yalamanchili S. Red fox: An execution environment for relational query processing on GPUs Proceedings of the 12th Acm/Ieee International Symposium On Code Generation and Optimization, Cgo 2014. 44-54. DOI: 10.1145/2544137.2544166  0.315
2014 Alexandrov B, Sullivan O, Song WJ, Yalamanchili S, Kumar S, Mukhopadhyay S. Control principles and on-chip circuits for active cooling using integrated superlattice-based thin-film thermoelectric devices Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 1909-1919. DOI: 10.1109/Tvlsi.2013.2278951  0.369
2014 Xiao H, Wan Z, Yalamanchili S, Joshi Y. Leakage power characterization and minimization in 3D stacked multi-core chips with microfluidic cooling Annual Ieee Semiconductor Thermal Measurement and Management Symposium. 207-212. DOI: 10.1109/SEMI-THERM.2014.6892241  0.339
2014 Anger E, Yalamanchili S, Pakin S, McCormick P. Architecture-independent modeling of intra-node data movement Proceedings of Llvm-Hpc 2014: 2014 Llvm Compiler Infrastructure in Hpc - Held in Conjunction With Sc 2014: the International Conference For High Performance Computing, Networking, Storage and Analysis. 29-39. DOI: 10.1109/LLVM-HPC.2014.6  0.373
2014 Wang J, Yalamanchili S. Characterization and analysis of dynamic parallelism in unstructured GPU applications Iiswc 2014 - Ieee International Symposium On Workload Characterization. 51-60. DOI: 10.1109/IISWC.2014.6983039  0.424
2013 Paul I, Ravi V, Manne S, Arora M, Yalamanchili S. Coordinated energy management in heterogeneous processors International Conference For High Performance Computing, Networking, Storage and Analysis, Sc. DOI: 10.3233/Spr-140380  0.402
2013 Lee J, Li S, Kim H, Yalamanchili S. Adaptive virtual channel partitioning for network-on-chip in heterogeneous architectures Acm Transactions On Design Automation of Electronic Systems. 18. DOI: 10.1145/2504906  0.429
2013 Wang J, Dong Z, Yalamanchili S, Riley G. Optimizing parallel simulation of multicore systems using domain-specific knowledge Sigsim-Pads 2013 - Proceedings of the 2013 Acm Sigsim Principles of Advanced Discrete Simulation. 127-136. DOI: 10.1145/2486092.2486108  0.305
2013 Diamos G, Wu H, Wang J, Lele A, Yalamanchili S. Relational algorithms for multi-bulk-synchronous processors Proceedings of the Acm Sigplan Symposium On Principles and Practice of Parallel Programming, Ppopp. 301-302. DOI: 10.1145/2442516.2442555  0.367
2013 Cho M, Kersey C, Gupta MP, Sathe N, Kumar S, Yalamanchili S, Mukhopadhyay S. Power multiplexing for thermal field management in many-core processors Ieee Transactions On Components, Packaging and Manufacturing Technology. 3: 94-104. DOI: 10.1109/Tcpmt.2012.2220546  0.322
2013 Dong Z, Wang J, Riley GF, Yalamanchili S. A study of the effect of partitioning on parallel simulation of multicore systems Proceedings - Ieee Computer Society's Annual International Symposium On Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, Mascots. 375-379. DOI: 10.1109/MASCOTS.2013.55  0.305
2013 Young J, Shon SH, Yalamanchili S, Merritt A, Schwan K, Froning H. Oncilla: A GAS runtime for efficient resource allocation and data movement in accelerated clusters Proceedings - Ieee International Conference On Cluster Computing, Iccc. DOI: 10.1109/CLUSTER.2013.6702679  0.31
2013 Lee J, Li S, Kim H, Yalamanchili S. Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture Journal of Parallel and Distributed Computing. 73: 1525-1538. DOI: 10.1016/J.Jpdc.2013.07.014  0.498
2012 Kerr A, Diamos G, Yalamanchili S. Dynamic compilation of data-parallel kernels for vector processors Proceedings - International Symposium On Code Generation and Optimization, Cgo 2012. 23-32. DOI: 10.1145/2259016.2259020  0.42
2012 Kersey CD, Rodrigues A, Yalamanchili S. A universal parallel front-end for execution driven microarchitecture simulation Acm International Conference Proceeding Series. 25-32. DOI: 10.1145/2162131.2162135  0.303
2012 Wang J, Beu J, Yalamanchili S, Conte T. Designing configurable, modifiable and reusable components for simulation of multicore systems Proceedings - 2012 Sc Companion: High Performance Computing, Networking Storage and Analysis, Scc 2012. 472-476. DOI: 10.1109/SC.Companion.2012.67  0.307
2012 Paul I, Yalamanchili S, John LK. Performance impact of virtual machine placement in a datacenter 2012 Ieee 31st International Performance Computing and Communications Conference, Ipccc 2012. 424-431. DOI: 10.1109/PCCC.2012.6407650  0.356
2012 Wu H, Diamos G, Cadambi S, Yalamanchili S. Kernel weaver: Automatically fusing database primitives for efficient GPU computation Proceedings - 2012 Ieee/Acm 45th International Symposium On Microarchitecture, Micro 2012. 107-118. DOI: 10.1109/MICRO.2012.19  0.358
2012 Farooqui N, Kerr A, Eisenhauer G, Schwan K, Yalamanchili S. Lynx: A dynamic instrumentation system for data-parallel applications on GPGPU architectures Ispass 2012 - Ieee International Symposium On Performance Analysis of Systems and Software. 58-67. DOI: 10.1109/ISPASS.2012.6189206  0.456
2012 Wu H, Diamos G, Wang J, Cadambi S, Yalamanchili S, Chakradhar S. Optimizing data warehousing applications for GPUs using kernel fusion/fission Proceedings of the 2012 Ieee 26th International Parallel and Distributed Processing Symposium Workshops, Ipdpsw 2012. 2433-2442. DOI: 10.1109/IPDPSW.2012.300  0.33
2012 Young J, Yalamanchili S. Commodity converged fabrics for global address spaces in accelerator clouds Proceedings of the 14th Ieee International Conference On High Performance Computing and Communications, Hpcc-2012 - 9th Ieee International Conference On Embedded Software and Systems, Icess-2012. 303-310. DOI: 10.1109/HPCC.2012.48  0.376
2012 Kerr A, Anger E, Hendry G, Yalamanchili S. Eiger: A framework for the automated synthesis of statistical performance models 2012 19th International Conference On High Performance Computing, Hipc 2012. DOI: 10.1109/HiPC.2012.6507525  0.396
2012 Kerr A, Diamos G, Yalamanchili S. GPU Application Development, Debugging, and Performance Tuning with GPU Ocelot Gpu Computing Gems Jade Edition. 409-427. DOI: 10.1016/B978-0-12-385963-1.00030-7  0.426
2011 Diamos G, Ashbaugh B, Maiyuran S, Kerr A, Wu H, Yalamanchili S. SIMD re-convergence at thread frontiers Proceedings of the Annual International Symposium On Microarchitecture, Micro. 477-488. DOI: 10.1145/2155620.2155676  0.32
2011 Farooqui N, Kerr A, Diamos G, Yalamanchili S, Schwan K. A framework for dynamically instrumenting GPU compute applications within GPU Ocelot Acm International Conference Proceeding Series. DOI: 10.1145/1964179.1964192  0.422
2011 Chatterjee S, Rasquinha M, Yalamanchili S, Mukhopadhyay S. A scalable design methodology for energy minimization of STTRAM: A circuit and architecture perspective Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 809-817. DOI: 10.1109/Tvlsi.2010.2041476  0.327
2011 Hassan SM, Choudhary D, Rasquinha M, Yalamanchili S. Regulating locality vs. parallelism tradeoffs in multiple memory controller environments Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 187-188. DOI: 10.1109/PACT.2011.33  0.304
2011 Vetter JS, Glassbrook R, Dongarra J, Schwan K, Loftis B, McNally S, Meredith J, Rogers J, Roth PC, Spafford K, Yalamanchili S. Keeneland: Bringing heterogeneous GPU computing to the computational science community Computing in Science and Engineering. 13: 90-95. DOI: 10.1109/Mcse.2011.83  0.315
2010 Diamos GF, Kerr AR, Yalamanchili S, Clark N. Ocelot: A dynamic optimization framework for bulk-synchronous applications in heterogeneous systems Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 353-364. DOI: 10.1145/1854273.1854318  0.465
2010 Kerr A, Diamos G, Yalamanchili S. Modeling GPU-CPU workloads and systems International Conference On Architectural Support For Programming Languages and Operating Systems - Asplos. 31-42. DOI: 10.1145/1735688.1735696  0.412
2010 Diamos G, Yalamanchili S. Speculative execution on multi-GPU systems Proceedings of the 2010 Ieee International Symposium On Parallel and Distributed Processing, Ipdps 2010. DOI: 10.1109/IPDPS.2010.5470427  0.445
2010 Almoosa N, Wardi Y, Yalamanchili S. Controller design for tracking induced miss-rates in cache memories 2010 8th Ieee International Conference On Control and Automation, Icca 2010. 1355-1359. DOI: 10.1109/ICCA.2010.5524405  0.3
2009 Kerr A, Diamos G, Yalamanchili S. A characterization and analysis of PTX kernels Proceedings of the 2009 Ieee International Symposium On Workload Characterization, Iiswc 2009. 3-12. DOI: 10.1109/IISWC.2009.5306801  0.453
2008 Diamos G, Yalamanchili S. Harmony: An execution model and runtime for heterogeneous many core systems Proceedings of the 17th International Symposium On High Performance Distributed Computing 2008, Hpdc'08. 197-200. DOI: 10.1145/1383422.1383447  0.502
2006 Caminero B, Carrión C, Quiles FJ, Duato J, Yalamanchili S. MMR: A MultiMedia Router architecture to support hybrid workloads Journal of Parallel and Distributed Computing. 66: 307-321. DOI: 10.1016/J.Jpdc.2005.10.002  0.379
2005 Caminero B, Carrión C, Quiles FJ, Duato J, Yalamanchili S. Traffic scheduling solutions with QoS support for an input-buffered multimedia router Ieee Transactions On Parallel and Distributed Systems. 16: 1009-1021. DOI: 10.1109/Tpds.2005.140  0.409
2004 Krishnamurthy R, Yalamanchili S, Schwan K, West R. ShareStreams: A scalable architecture and hardware support for high-speed QoS packet schedulers Proceedings - 12th Annual Ieee Symposium On Field-Programmable Custom Computing Machines, Fccm 2004. 115-124. DOI: 10.1109/FCCM.2004.52  0.375
2004 Palem KV, Chakrapani LN, Yalamanchili S. A framework for compiler driven design space exploration for embedded system customization Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3321: 395-406. DOI: 10.1007/978-3-540-30502-6_29  0.445
2003 Krishnamurthy R, Yalamanchili S, Schwan K, West R. Leveraging block decisions and aggregation in the ShareStreams QoS architecture Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2003. DOI: 10.1109/IPDPS.2003.1213111  0.381
2003 Caminero B, Carrión C, Quiles FJ, Duato J, Yalamanchili S. A hardware approach to QoS support in cluster environments: The multimedia router MMR Proceedings of the International Conference On Parallel and Distributed Processing Techniques and Applications. 1: 220-226.  0.304
2002 Caminero B, Carrion C, Quiles FJ, Duato J, Yalamanchili S. A multimedia router architecture to provide high performance and QoS guarantees to mixed traffic Proceedings - 2002 Ieee International Conference On Multimedia and Expo, Icme 2002. 1: 313-316. DOI: 10.1109/ICME.2002.1035781  0.313
2000 Suh YJ, Dao BV, Duato J, Yalamanchili S. Software-based rerouting for fault-tolerant pipelined communication Ieee Transactions On Parallel and Distributed Systems. 11: 193-211. DOI: 10.1109/71.841738  0.362
1999 Dao BV, Duato J, Yalamanchili S. Dynamically configurable message flow control for fault-tolerant routing Ieee Transactions On Parallel and Distributed Systems. 10: 7-22. DOI: 10.1109/71.744829  0.319
1999 Hamblen JO, Owen HL, Yalamanchili S, Dao B. An undergraduate computer engineering rapid systems prototyping design laboratory Ieee Transactions On Education. 42: 8-14. DOI: 10.1109/13.746325  0.422
1999 West R, Krishnamurthy R, Norton WK, Schwan K, Yalamanchili S, Rosu M, Sarat V. QUIC: A quality of service network interface layer for communication in NOWs Proceedings of the Heterogeneous Computing Workshop, Hcw. 199-208.  0.348
1997 Garg V, Stogner DJ, Ulmer C, Schimmel DE, Dislis C, Yalamanchili S, Wills DS. Early analysis of cost/performance trade-offs in MGM systems Ieee Transactions On Components Packaging and Manufacturing Technology Part B. 20: 308-318. DOI: 10.1109/96.618231  0.386
1997 Rosu D, Schwan K, Yalamanchili S, Jha R. On adaptive resource allocation for complex real-time applications Proceedings - Real-Time Systems Symposium. 320-329.  0.359
1996 Hamblen JO, Owen H, Yalamanchili S, Dao B. Using rapid prototyping in computer architecture design laboratories Proceedings of the 1996 Workshop On Computer Architecture Education, Wcae-2 1996 At Hpca-2. DOI: 10.1145/1275152.1275156  0.33
1996 Flur PW, Lockhart JB, Yalamanchili S. Integrating academic services in a modern networked environment Ieee Transactions On Education. 39: 409-414. DOI: 10.1109/13.538766  0.318
1996 Gaughan PT, Dao BV, Yalamanchili S, Schimmel DE. Distributed, deadlock-free routing in faulty, pipelined, direct interconnection networks Ieee Transactions On Computers. 45: 651-665. DOI: 10.1109/12.506422  0.4
1995 Sellami H, Yalamanchili S. Parallelism in Sequential Multiprocessor Simulation Models: A Case Study Acm Transactions On Modeling and Computer Simulation (Tomacs). 5: 101-128. DOI: 10.1145/210330.210333  0.419
1995 Yalamanchili S, Winkel LT, Perschbacher D, Shenoy B. Partitioning and mapping in embedded multiprocessor architectures in the presence of constraints Concurrency and Computation: Practice and Experience. 7: 167-189. DOI: 10.1002/Cpe.4330070302  0.493
1993 Yalamanchili S, Te Winkel L, Perschbacher D, Shenoy B. Genie: An environment for partitioning and mapping in embedded multiprocessors Proceedings of the 5th Ieee Symposium On Parallel and Distributed Processing. 522-529.  0.409
1990 Carpenter T, Yalamanchili S. Techniques and tools for efficiently modeling multiprocessor systems . 499-504.  0.304
1988 Aggarwal JK, Yalamanchili S. Multiprocessor reconfiguration techniques Proceedings - Ieee International Symposium On Circuits and Systems. 3: 2749-2750.  0.366
1985 Yalamanchili S, Aggarwal JK. Reconfiguration strategies for Parallel Architectures Computer. 18: 44-61. DOI: 10.1109/MC.1985.1662776  0.32
1985 Yalamanchili S, Aggarwal JK. Analysis of a model for parallel image processing Pattern Recognition. 18: 1-16. DOI: 10.1016/0031-3203(85)90002-0  0.414
1983 Yalamanchili S, Aggarwal JK. MODEL FOR PARALLEL IMAGE PROCESSING Proceedings of Spie - the International Society For Optical Engineering. 435: 82-89.  0.337
Show low-probability matches.