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Gerold W. Neudeck - Publications

Affiliations: 
Purdue University, West Lafayette, IN, United States 
Area:
Electronics and Electrical Engineering, Materials Science Engineering
Website:
https://nanohub.org/members/9460
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69 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2003 Yang J, Denton J, Neudeck G. Ammonia nitrided isolation oxide for selective epitaxial growth technology to eliminate edge transistor effects of SOI and bulk N-channel MOSFETs Electronics Letters. 39: 1013. DOI: 10.1049/El:20030642  0.755
2002 Yang J, Neudeck GW, Denton JP. Electrical effects of a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal–oxide–semiconductor field-effect transistors Journal of Applied Physics. 91: 420. DOI: 10.1063/1.1417995  0.737
2001 Bourland S, Denton J, Ikram A, Neudeck GW, Bashir R. Silicon-on-insulator processes for the fabrication of novel nanostructures Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 19: 1995. DOI: 10.1116/1.1404980  0.7
2001 Ahmed SS, Denton JP, Neudeck GW. Nitrided thermal SiO[sub 2] for use as top and bottom gate insulators in self-aligned double gate silicon-on-insulator metal–oxide–semiconductor field effect transistor Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 19: 800. DOI: 10.1116/1.1364698  0.71
2001 Yang J, Denton JP, Neudeck GW. Edge transistor elimination in oxide trench isolated N-channel metal–oxide–semiconductor field effect transistors Journal of Vacuum Science & Technology B. 19: 327-332. DOI: 10.1116/1.1358854  0.749
2000 Bashir R, Su T, Sherman JM, Neudeck GW, Denton J, Obeidat A. Reduction of sidewall defect induced leakage currents by the use of nitrided field oxides in silicon selective epitaxial growth isolation for advanced ultralarge scale integration Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 18: 695-699. DOI: 10.1116/1.591261  0.748
2000 Bashir R, Gupta A, Neudeck GW, McElfresh M, Gomez R. On the design of piezoresistive silicon cantilevers with stress concentration regions for scanning probe microscopy applications Journal of Micromechanics and Microengineering. 10: 483-491. DOI: 10.1088/0960-1317/10/4/301  0.527
2000 Yang J, Neudeck GW, Denton JP. Unique method to electrically characterize a single stacking fault in silicon-on-insulator metal–oxide–semiconductor field-effect transistors Applied Physics Letters. 77: 4034-4036. DOI: 10.1063/1.1331641  0.723
2000 Gómez R, Bashir R, Neudeck GW. On the design and fabrication of novel Lateral Bipolar Transistor in a deep-submicron technology Microelectronics Journal. 31: 199-205. DOI: 10.1016/S0026-2692(99)00134-2  0.623
1999 Neudeck GW, Pae S, Denton JP, Su T. Multiple layers of silicon-on-insulator for nanostructure devices Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 17: 994. DOI: 10.1116/1.590682  0.767
1999 Pae S, Su T, Denton JP, Neudeck GW. Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth Ieee Electron Device Letters. 20: 194-196. DOI: 10.1109/55.761012  0.762
1997 Lee IM, Wang WC, Koh MTK, Denton JP, Kvam EP, Neudeck GW, Takoudis CG. Selective epitaxial growth of strained silicon-germanium films in tubular hot-wall low pressure chemical vapor deposition systems Materials Research Society Symposium - Proceedings. 448: 265-270. DOI: 10.1557/Proc-448-265  0.475
1997 Kongetira P, Neudeck GW, Takoudis CG. Expression for the growth rate of selective epitaxial growth of silicon using dichlorosilane, hydrogen chloride, and hydrogen in a low pressure chemical vapor deposition pancake reactor Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 15: 1902-1907. DOI: 10.1116/1.589576  0.372
1997 Neudeck GW, Merritt KD, Denton JP. Stacking fault reduction in Silicon-on-Insulator (SOI) islands produced by Selective Epitaxial Growth (SEG) of Silicon using a thermally nitrided SiO2 field insulator Microelectronic Engineering. 36: 391-394. DOI: 10.1016/S0167-9317(97)00087-7  0.588
1996 Neudeck GW, Spitz J, Chang JC, Denton JP, Gallagher N. Precision crystal corner cube arrays for optical gratings formed by (100) silicon planes with selective epitaxial growth. Applied Optics. 35: 3466-70. PMID 21102736 DOI: 10.1364/Ao.35.003466  0.614
1996 Leet I-, Wang W-, Koh MTK, Denton J, Kvam EP, Neudeck GW, Takoudis CG. Selective Epitaxial Growth of Strained Silicon-Germanium Films in Tubular Hot-Wall Low Pressure Chemical Vapor Deposition Systems Mrs Proceedings. 448. DOI: 10.1557/PROC-448-265  0.376
1996 Watts JS, Neudeck GW. Buried‐gate oxide thinning during epitaxial lateral overgrowth for dual‐gated metal–oxide–semiconductor field‐effect transistors Journal of Vacuum Science & Technology B. 14: 1670-1674. DOI: 10.1116/1.589208  0.533
1996 Gaynor W, Takoudis CG, Neudeck GW. Process–property relationships between silicon selective epitaxial growth ambients and degradation of insulators Journal of Vacuum Science & Technology a: Vacuum, Surfaces, and Films. 14: 3224-3227. DOI: 10.1116/1.580217  0.404
1996 Denton JP, Neudeck GW. Fully depleted dual-gated thin-film SOI P-MOSFETs fabricated in SOI islands with an isolated buried polysilicon backgate Ieee Electron Device Letters. 17: 509-511. DOI: 10.1109/55.541764  0.434
1996 Sherman JM, Neudeck GW, Denton JP, Bashir R, Fultz WW. Elimination of the sidewall defects in Selective Epitaxial Growth (SEG) of silicon for a dielectric isolation technology Ieee Electron Device Letters. 17: 267-269. DOI: 10.1109/55.496453  0.698
1996 Pak JJ, Kabir AE, Neudeck GW, Logsdon JH. A bridge-type piezoresistive accelerometer using merged epitaxial lateral overgrowth for thin silicon beam formation Sensors and Actuators, a: Physical. 56: 267-271. DOI: 10.1016/S0924-4247(96)01319-2  0.466
1996 Lee I, Wang W, Neudeck G, Takoudis C. Kinetics and modeling of low pressure chemical vapor deposition of Si1−xGex epitaxial thin films Chemical Engineering Science. 51: 2681-2686. DOI: 10.1016/0009-2509(96)00136-4  0.387
1995 Bashir R, Neudeck GW, Haw Y, Kvam EP. Characterization and modelling of sidewall defects in selective epitaxial growth of silicon Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 13: 928-935. DOI: 10.1116/1.588208  0.627
1995 Bashir R, Neudeck GW, Haw Y, Kvam EP, Denton JP. Characterization of sidewall defects in selective epitaxial growth of silicon Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 13: 923-927. DOI: 10.1116/1.588207  0.632
1995 Bashir R, Kim S, Qadri N, Jin D, Neudeck GW, Denton JP, Yeric G, Wu K, Tasch A. Degradation of insulators in Silicon Selective Epitaxial Growth (SEG) ambient Ieee Electron Device Letters. 16: 382-384. DOI: 10.1109/55.406795  0.642
1995 Kessler J, Neudeck G, Glenn J. Low defect planar SOI islands adjacent to selective epitaxial growth (SEG) Microelectronic Engineering. 28: 435-438. DOI: 10.1016/0167-9317(95)00091-L  0.417
1995 Samavedam SB, Kvam EP, Kabir AE, Neudeck GW. Defect structures in silicon merged epitaxial lateral overgrowth Journal of Electronic Materials. 24: 1747-1751. DOI: 10.1007/Bf02676844  0.472
1994 Siekkinen J, Neudeck G, Glenn J, Venkatesan S. A novel high-speed silicon bipolar transistor utilizing SEG and CLSEG Ieee Transactions On Electron Devices. 41: 862-864. DOI: 10.1109/16.285047  0.491
1994 Venkatesan S, Pierret R, Neudeck G. A new linear sweep technique to measure generation lifetimes in thin-film SOI MOSFET's Ieee Transactions On Electron Devices. 41: 567-574. DOI: 10.1109/16.278511  0.368
1994 Lee W, Neudeck GW, Han M. Temperature-dependent ID-VD characteristics and analytical model for a-Si:H thin film transistors Solid-State Electronics. 37: 1896-1898. DOI: 10.1016/0038-1101(94)90184-8  0.354
1993 Yen H, Bashir R, Kvam EP, Neudeck GW. Microstructural Examination of Extended Crystal Defects in Silicon Selective Epitaxial Growth (SEG) Mrs Proceedings. 319. DOI: 10.1557/Proc-319-195  0.66
1993 Choi JS, Neudeck GW, Luan S. A computer model for inter-electrode capacitance-voltage characteristics of an a-Si:H TFT Solid-State Electronics. 36: 223-228. DOI: 10.1016/0038-1101(93)90144-F  0.369
1993 Yen H, Kvam EP, Bashir R, Neudeck GW. Microstructural examination of extended crystal defects in silicon selective epitaxial growth Journal of Electronic Materials. 22: 1331-1339. DOI: 10.1007/Bf02817696  0.65
1992 Subramanian CK, Neudeck GW. Large area silicon on insulator by double‐merged epitaxial lateral overgrowth Journal of Vacuum Science & Technology B. 10: 643-647. DOI: 10.1116/1.586425  0.47
1992 Bashir R, Venkatesan S, Neudeck GW, Denton JP. A Polysilicon Contacted Subcollector BJT for a Three-Dimensional BiCMOS Process Ieee Electron Device Letters. 13: 392-395. DOI: 10.1109/55.192769  0.64
1992 Venkatesan S, Neudeck GW, Pierret RF. Dual-gate operation and volume inversion in n-channel SOI MOSFET's Ieee Electron Device Letters. 13: 44-46. DOI: 10.1109/55.144946  0.425
1992 Choi JS, Neudeck GW. Frequency-Dependent Capacitance—Voltage Characteristics for Amorphous Silicon-Based Metal-Insulator-Semiconductor Structures Ieee Transactions On Electron Devices. 39: 2515-2522. DOI: 10.1109/16.163450  0.351
1992 Glenn JL, Neudeck GW, Subramanian CK, Denton JP. Fully planar method for creating adjacent ‘‘self‐isolating’’ silicon‐on‐insulator and epitaxial layers by epitaxial lateral overgrowth Applied Physics Letters. 60: 483-485. DOI: 10.1063/1.106643  0.454
1992 Frost R, Mordaunt K, Yang SK, Neudeck GW, Takoudis CG. Fundamental studies on the selective epitaxial growth of silicon-based films Chemical Engineering Science. 47: 2969-2974. DOI: 10.1016/0009-2509(92)87160-R  0.364
1991 Oh IH, Takoudis CG, Neudeck GW. Mathematical modeling of epitaxial silicon growth in pancake chemical vapor deposition reactors Journal of the Electrochemical Society. 138: 554-567. DOI: 10.1149/1.2085628  0.313
1991 Pak JJ, Neudeck GW, Kabir AE, Deroo DW, Staller SE, Logsdon JH. A New Method of Forming a Thin Single-Crystal Silicon Diaphragm using Merged Epitaxial Lateral Overgrowth for Sensor Applications Ieee Electron Device Letters. 12: 614-616. DOI: 10.1109/55.119215  0.476
1991 Gilbert P, Neudeck G, Denton J, Duey S. Quasi-dielectrically isolated bipolar junction transistor with subcollector fabricated using silicon selective epitaxy Ieee Transactions On Electron Devices. 38: 1660-1665. DOI: 10.1109/16.85164  0.538
1991 Lee W, Neudeck G, Choi J, Luan S. A model for the temperature-dependent saturated I/sub D/-V/sub D/ characteristics of an a-Si:H thin-film transistor Ieee Transactions On Electron Devices. 38: 2070-2074. DOI: 10.1109/16.83732  0.376
1991 Luo F, Neudeck GW, Luan S. Simulation of the turn-on transient behavior of amorphous-silicon thin-film transistors Solid-State Electronics. 34: 1289-1295. DOI: 10.1016/0038-1101(91)90070-F  0.416
1990 Schubert PJ, Neudeck GW. Confined Lateral Selective Epitaxial Growth of Silicon for Device Fabrication Ieee Electron Device Letters. 11: 181-183. DOI: 10.1109/55.55243  0.559
1990 Schubert PJ, Neudeck GW. Vertical Bipolar Transistors Fabricated in Local Silicon on Insulator Films Prepared Using Confined Lateral Selective Epitaxial Growth (CLSEG) Ieee Transactions On Electron Devices. 37: 2336-2342. DOI: 10.1109/16.62284  0.477
1990 Klaasen W, Neudeck G. Sidewall gate controlled diode for the measurement of silicon selective epitaxial growth-SiO/sub 2/ interface defects Ieee Transactions On Electron Devices. 37: 273-279. DOI: 10.1109/16.43825  0.516
1990 Zingg RP, Friedrich JA, Neudeck GW, Hofflinger B. Three-dimensional stacked MOS transistors by localized silicon epitaxial overgrowth Ieee Transactions On Electron Devices. 37: 1452-1461. DOI: 10.1109/16.106240  0.566
1990 Luan S, Neudeck GW. Effect of NH3plasma treatment of gate nitride on the performance of amorphous silicon thin‐film transistors Journal of Applied Physics. 68: 3445-3450. DOI: 10.1063/1.346354  0.381
1990 Bashir R, Neudeck GW. A technique to measure the dynamic response of a-Si:H thin film transistor circuits Solid State Electronics. 33: 973-974. DOI: 10.1016/0038-1101(90)90082-P  0.517
1990 Glenn JL, Neudeck GW, Friedrich JA. An inverted and stacked PMOS transistor by silicon epitaxial lateral overgrowth Solid-State Electronics. 33: 881-884. DOI: 10.1016/0038-1101(90)90069-Q  0.57
1990 Neudeck GW, Schubert PJ, Glenn JL, Friedrich JA, Klaasen WA, Zingg RP, Denton JP. Three dimensional devices fabricated by silicon epitaxial lateral overgrowth Journal of Electronic Materials. 19: 1111-1117. DOI: 10.1007/Bf02651990  0.603
1989 Zingg RP, Hüfflinger B, Neudeck GW. Novel Stacked CMOS Process by Local Overgrowth Mrs Proceedings. 158. DOI: 10.1557/Proc-158-365  0.468
1989 Friedrich JA, Neudeck GW. Interface characterization of silicon epitaxial lateral growth over existing SiO/sub 2/ for three-dimensional CMOS structures Ieee Electron Device Letters. 10: 144-146. DOI: 10.1109/55.31698  0.539
1989 Bashir R, Chung KY, Subramanian CK, Neudeck GW. Delay Time Studies and Electron Mobility Measurement in an a-Si: H TFT Ieee Transactions On Electron Devices. 36: 2944-2948. DOI: 10.1109/16.40960  0.569
1989 Friedrich JA, Kastelic M, Neudeck GW, Takoudis CG. The dependence of silicon selective epitaxial growth rates on masking oxide thickness Journal of Applied Physics. 65: 1713-1716. DOI: 10.1063/1.342943  0.463
1988 Siekkinen J, Klaasen W, Neudeck G. Selective epitaxial growth silicon bipolar transistors for material characterization Ieee Transactions On Electron Devices. 35: 1640-1644. DOI: 10.1109/16.7366  0.593
1988 Kastelic M, Oh I, Takoudis CG, Friedrich JA, Neudeck GW. Selective epitaxial growth of silicon in pancake reactors Chemical Engineering Science. 43: 2031-2036. DOI: 10.1016/0009-2509(88)87080-5  0.531
1987 Neudeck GW, Chung KY, Bare H. An Accurate CAD Model for the Ambipolar a-Si: H TFT Ieee Transactions On Electron Devices. 34: 866-871. DOI: 10.1109/T-Ed.1987.23008  0.402
1987 Neudeck GW, Bare HF, Chung KY. Modeling of ambipolar a-Si:H thin-film transistors Ieee Transactions On Electron Devices. 34: 344-350. DOI: 10.1109/T-Ed.1987.22928  0.483
1987 Neudeck GW. A new epitaxial lateral overgrowth silicon bipolar transistor Ieee Electron Device Letters. 8: 492-495. DOI: 10.1109/Edl.1987.26705  0.485
1987 Chung KY, Neudeck GW. Analytical modeling of a-Si:H thin-film transistors Journal of Applied Physics. 62: 4617-4624. DOI: 10.1063/1.339007  0.31
1986 Bare HF, Neudeck GW. Etching patterns in amorphous silicon Journal of Vacuum Science & Technology a: Vacuum, Surfaces, and Films. 4: 239-241. DOI: 10.1116/1.573479  0.322
1986 Neudeck GW, Chung KY, Bare HF, Li Z. A simplified model for the static characteristics of amorphous silicon thin-film transistors Solid State Electronics. 29: 639-645. DOI: 10.1016/0038-1101(86)90146-2  0.43
1985 Liu S, Newstrom K, Hibbs-Brenner M, Stokes R, Hoefflinger B, Neudeck G, Zingg R, Bousse L, Meindl J. Morphology of Silicon Islands Grown By Selective Epitaxy Over Silicon Dioxide Mrs Proceedings. 53. DOI: 10.1557/Proc-53-169  0.541
1980 Neudeck GW, Razouk LR. The p+n−n+ pulsed diode at extreme current densities—II Solid-State Electronics. 23: 151-155. DOI: 10.1016/0038-1101(80)90152-5  0.34
1980 Razouk LR, Neudeck GW. The p+n−n+ diode pulsed at extreme current densities—I Solid-State Electronics. 23: 143-149. DOI: 10.1016/0038-1101(80)90151-3  0.315
1979 Razouk R, Gunshor R, Razouk L, Neudeck G. The internal dynamics and small signal analysis of BARITT diodes Solid-State Electronics. 22: 1011-1015. DOI: 10.1016/0038-1101(79)90004-2  0.346
1976 Neudeck GW, Malhotra AK. An amorphous silicon thin film transistor: Theory and experiment Solid-State Electronics. 19: 721-729. DOI: 10.1016/0038-1101(76)90149-0  0.49
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