Year |
Citation |
Score |
2007 |
Powell MD, Vijaykumar TN. Resource area dilation to reduce power density in throughput servers Proceedings of the International Symposium On Low Power Electronics and Design. 268-273. DOI: 10.1145/1283780.1283838 |
0.635 |
|
2005 |
Powell MD, Schuchman E, Vijaykumar TN. Balancing resource utilization to mitigate power density in processor pipelines Proceedings of the Annual International Symposium On Microarchitecture, Micro. 294-304. DOI: 10.1109/MICRO.2005.14 |
0.655 |
|
2005 |
Chishti Z, Powell MD, Vijaykumar TN. Optimizing replication, communication, and capacity allocation in CMPs Proceedings - International Symposium On Computer Architecture. 357-368. |
0.596 |
|
2004 |
Powell MD, Gomaa M, Vijaykumar TN. Heat-and-run: Leveraging SMT and CMP to manage power density through the operating system Operating Systems Review (Acm). 38: 260-270. DOI: 10.1145/1037949.1024424 |
0.615 |
|
2004 |
Powell MD, Vijaykumar TN. Exploiting resonant behavior to reduce inductive noise Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 31: 288-299. |
0.591 |
|
2003 |
Chishti Z, Powell MD, Vijaykumar TN. Distance associativity for high-performance energy-efficient non-uniform cache architectures Proceedings of the Annual International Symposium On Microarchitecture, Micro. 2003: 55-66. DOI: 10.1109/MICRO.2003.1253183 |
0.617 |
|
2003 |
Powell MD, Vijaykumar TN. Pipeline Muffling and A Priori Current Ramping: Architectural Techniques to Reduce High-Frequency Inductive Noise Proceedings of the International Symposium On Low Power Electronics and Design. 223-228. |
0.631 |
|
2003 |
Powell MD, Vijaykumar TN. Pipeline damping: A microarchitectural technique to reduce inductive noise in supply voltage Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 72-83. |
0.622 |
|
2002 |
Park I, Powell MD, Vijaykumar TN. Reducing register ports for higher speed and lower energy Proceedings of the Annual International Symposium On Microarchitecture, Micro. 2002: 171-182. DOI: 10.1109/MICRO.2002.1176248 |
0.61 |
|
2001 |
Powell M, Yang SH, Falsafi B, Roy K, Vijaykumar TN. Reducing leakage in a high-performance deep-submicron instruction cache Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 9: 77-89. DOI: 10.1109/92.920821 |
0.629 |
|
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