Xiaoxiao Zhu, Ph.D. - Publications

Affiliations: 
2010 George Mason University, Washington, DC 
Area:
Electronics and Electrical Engineering

12 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2014 Li Q, Xiong HD, Liang X, Zhu X, Gu D, Ioannou DE, Baumgart H, Richter CA. Self-assembled nanowire array capacitors: capacitance and interface state profile. Nanotechnology. 25: 135201. PMID 24584362 DOI: 10.1088/0957-4484/25/13/135201  0.634
2011 Liang X, Sperling BA, Calizo I, Cheng G, Hacker CA, Zhang Q, Obeng Y, Yan K, Peng H, Li Q, Zhu X, Yuan H, Walker AR, Liu Z, Peng LM, et al. Toward clean and crackless transfer of graphene. Acs Nano. 5: 9144-53. PMID 21999646 DOI: 10.1021/Nn203377T  0.323
2011 Zhu X, Li Q, Ioannou DE, Gu D, Bonevich JE, Baumgart H, Suehle JS, Richter CA. Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells. Nanotechnology. 22: 254020. PMID 21572210 DOI: 10.1088/0957-4484/22/25/254020  0.641
2009 Li Q, Zhu X, Yang Y, Ioannou DE, Xiong HD, Kwon DW, Suehle JS, Richter CA. The large-scale integration of high-performance silicon nanowire field effect transistors. Nanotechnology. 20: 415202. PMID 19755723 DOI: 10.1088/0957-4484/20/41/415202  0.618
2009 Zhu X, Gu D, Li Q, Baumgart H, Ioannou DE, Suehle JS, Richter CA. Application of ALD high-k dielectric films as charge storage layer and blocking oxide in nonvolatile memories Ecs Transactions. 25: 473-479. DOI: 10.1149/1.3206647  0.42
2009 Zhu X, Li Q, Ioannou DE, Gu D, Baumgart H, Bonevich JE, Suehle JS, Richter CA. Silicon nanowire nonvolatile-memory with varying HfO2 charge trapping layer thickness 2009 International Semiconductor Device Research Symposium, Isdrs '09. DOI: 10.1109/ISDRS.2009.5378132  0.346
2009 Zhu X, Gu D, Li Q, Ioannou DE, Baumgart H, Suehle JS, Richter CA. Silicon nanowire NVM with high-k gate dielectric stack Microelectronic Engineering. 86: 1957-1960. DOI: 10.1016/J.Mee.2009.03.095  0.641
2008 Richter CA, Xiong HD, Zhu X, Wang W, Stanford VM, Hong WK, Lee T, Ioannou DE, Li Q. Metrology for the electrical characterization of semiconductor nanowires Ieee Transactions On Electron Devices. 55: 3086-3095. DOI: 10.1109/Ted.2008.2005394  0.617
2008 Li Q, Zhu X, Yang Y, Ioannou DE, Xiong HD, Suehle JS, Richter CA. Design, fabrication and characterization of high-performance silicon nanowire transistors 2008 8th Ieee Conference On Nanotechnology, Ieee-Nano. 526-529. DOI: 10.1109/NANO.2008.157  0.431
2008 Zhu X, Yang Y, Li Q, Ioannou DE, Suehle JS, Richter CA. Silicon nanowire NVM cell using high-k dielectric charge storage layer Microelectronic Engineering. 85: 2403-2405. DOI: 10.1016/J.Mee.2008.09.013  0.655
2007 Zhu X, Li Q, Ioannou DE, Kimes WA, Suehle JS, Maslar JE, Xiong HD, Yang S, Richter CA. Silicon nanowire memory application using hafnium oxide charge storage layer 2007 International Semiconductor Device Research Symposium, Isdrs. DOI: 10.1109/ISDRS.2007.4422492  0.359
2007 Li Q, Zhu X, Xiong HD, Koo SM, Ioannou DE, Kopanski JJ, Suehle JS, Richter CA. Silicon nanowire on oxide/nitride/oxide for memory application Nanotechnology. 18. DOI: 10.1088/0957-4484/18/23/235204  0.659
Show low-probability matches.