Year |
Citation |
Score |
2019 |
Islam R, Guthaus MR. HCDN: Hybrid-Mode Clock Distribution Networks Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 251-262. DOI: 10.1109/Tcsi.2018.2866224 |
0.466 |
|
2018 |
Islam R, Fahmy HA, Lin PY, Guthaus MR. DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis Ieee Transactions On Very Large Scale Integration Systems. 26: 2108-2117. DOI: 10.1109/Tvlsi.2018.2837681 |
0.511 |
|
2016 |
Islam R, Guthaus MR. CMCS: Current-Mode Clock Synthesis Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2016.2605580 |
0.535 |
|
2015 |
Sankaranarayanan R, Guthaus MR. A single-VDD ultra-low energy sub-threshold FPGA Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc. 7: 219-224. DOI: 10.1109/VLSI-SoC.2012.7332104 |
0.323 |
|
2015 |
Islam R, Guthaus MR. Low-Power Clock Distribution Using a Current-Pulsed Clocked Flip-Flop Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 1156-1164. DOI: 10.1109/Tcsi.2015.2402938 |
0.448 |
|
2015 |
Lin PY, Fahmy HA, Islam R, Guthaus MR. LC resonant clock resource minimization using compensation capacitance Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 1406-1409. DOI: 10.1109/ISCAS.2015.7168906 |
0.338 |
|
2015 |
Lacara BM, Lin PY, Guthaus MR. Multi-frequency resonant clocks Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 1402-1405. DOI: 10.1109/ISCAS.2015.7168905 |
0.325 |
|
2015 |
Fahmy HA, Lin PY, Islam R, Guthaus MR. Switched capacitor quasi-adiabatic clocks Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 1398-1401. DOI: 10.1109/ISCAS.2015.7168904 |
0.532 |
|
2015 |
Guthaus MR, Wilke G. Variability-aware clock design Circuit Design For Reliability. 255-272. DOI: 10.1007/978-1-4614-4078-9_12 |
0.301 |
|
2014 |
Samandari-Rad J, Guthaus M, Hughey R. Confronting the variability issues affecting the performance of next-generation SRAM design to optimize and predict the speed and yield Ieee Access. 2: 577-601. DOI: 10.1109/Access.2014.2323233 |
0.373 |
|
2013 |
Guthaus MR, Wilke G, Reis R. Revisiting automated physical synthesis of high-performance clock networks Acm Transactions On Design Automation of Electronic Systems. 18. DOI: 10.1145/2442087.2442102 |
0.404 |
|
2013 |
Logan S, Guthaus MR. Redundant C4 power pin placement to ensure robust power grid delivery Midwest Symposium On Circuits and Systems. 449-452. DOI: 10.1109/MWSCAS.2013.6674682 |
0.333 |
|
2012 |
Hu X, Condley W, Guthaus MR. Library-aware resonant clock synthesis (LARCS) Proceedings - Design Automation Conference. 145-150. DOI: 10.1145/2228360.2228389 |
0.406 |
|
2012 |
Guthaus MR, Hu X, Wilke G, Flach G, Reis R. High-performance clock mesh optimization Acm Transactions On Design Automation of Electronic Systems. 17. DOI: 10.1145/2209291.2209306 |
0.512 |
|
2012 |
Kim S, Guthaus MR. Dynamic voltage scaling for SEU-tolerance in low-power memories 20th Ifip/Ieee International Conference On Very Large Scale Integration, Vlsi-Soc 2012 - Proceedings. 207-212. DOI: 10.1109/VLSI-SoC.2012.6379031 |
0.374 |
|
2012 |
Hu X, Guthaus MR. Distributed LC resonant clock grid synthesis Ieee Transactions On Circuits and Systems I: Regular Papers. 59: 2749-2760. DOI: 10.1109/Tcsi.2012.2190671 |
0.5 |
|
2012 |
Guthaus MR, Taskin B. High-performance, low-power resonant clocking: Embedded tutorial Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 742-745. |
0.466 |
|
2011 |
Kim S, Guthaus MR. SNM-aware power reduction and reliability improvement in 45nm SRAMs 2011 Ieee/Ifip 19th International Conference On Vlsi and System-On-Chip, Vlsi-Soc 2011. 204-207. DOI: 10.1109/VLSISoC.2011.6081666 |
0.364 |
|
2011 |
Logan S, Guthaus MR. Fast thermal-aware floorplanning using white-space optimization Proceedings - 17th Ifip International Conference On Very Large Scale Integration, Vlsi-Soc 2009. 65-70. DOI: 10.1109/VLSISOC.2009.6041332 |
0.36 |
|
2011 |
Guthaus MR. Distributed LC resonant clock tree synthesis Proceedings - Ieee International Symposium On Circuits and Systems. 1215-1218. DOI: 10.1109/ISCAS.2011.5937788 |
0.344 |
|
2011 |
Kim S, Guthaus MR. Low-power multiple-bit upset tolerant memory optimization Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 577-581. DOI: 10.1109/ICCAD.2011.6105388 |
0.387 |
|
2011 |
Condley WJ, Hu X, Guthaus MR. A methodology for local resonant clock synthesis using LC-assisted local clock buffers Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 503-506. DOI: 10.1109/ICCAD.2011.6105376 |
0.307 |
|
2011 |
Hu X, Guthaus MR. Clock tree optimization for Electromagnetic Compatibility (EMC) Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 184-189. DOI: 10.1109/ASPDAC.2011.5722181 |
0.316 |
|
2010 |
Guthaus MR, Wilke G, Reis R. Non-uniform clock mesh optimization with linear programming buffer insertion Proceedings - Design Automation Conference. 74-79. DOI: 10.1145/1837274.1837295 |
0.397 |
|
2010 |
Chan D, Guthaus MR. Analysis of power supply induced jitter in actively de-skewed multi-core systems Proceedings of the 11th International Symposium On Quality Electronic Design, Isqed 2010. 785-790. DOI: 10.1109/ISQED.2010.5450490 |
0.447 |
|
2005 |
Ravindran RA, Senger RM, Marsman ED, Dasika GS, Guthaus MR, Mahlke SA, Brown RB. Partitioning variables across register windows to reduce spill code in a low-power processor Ieee Transactions On Computers. 54: 998-1012. DOI: 10.1109/Tc.2005.132 |
0.667 |
|
2005 |
Marsman ED, Senger RM, McCorquodale MS, Guthaus MR, Ravindran RA, Dasika GS, Mahlke SA, Brown RB. A 16-bit low-power microcontroller with monolithic MEMS-LC clocking Proceedings - Ieee International Symposium On Circuits and Systems. 624-627. DOI: 10.1109/ISCAS.2005.1464665 |
0.693 |
|
2003 |
Ravindran RA, Senger RM, Marsman ED, Dasika GS, Guthaus MR, Mahlke SA, Brown RB. Increasing the number of effective registers in a low-power processor using a windowed register file Cases 2003: International Conference On Compilers, Architecture, and Synthesis For Embedded Systems. 125-136. |
0.686 |
|
2003 |
Senger RM, Marsman ED, McCorquodale MS, Gebara FH, Kraver KL, Guthaus MR, Brown RB. A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference Proceedings - Design Automation Conference. 520-525. |
0.637 |
|
2001 |
Kraver KL, Guthaus MR, Strong TD, Bird PL, Cha GS, Höld W, Brown RB. A mixed-signal sensor interface microinstrument Sensors and Actuators a: Physical. 91: 266-277. DOI: 10.1016/S0924-4247(01)00596-9 |
0.459 |
|
2001 |
Kraver KL, Guthaus MR, Strong TD, Bird PL, Cha GS, Höld W, Brown RB. A mixed-signal sensor interface microinstrument Sensors and Actuators, a: Physical. 90: 266-277. |
0.368 |
|
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