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Kong-Pang Pun - Publications

Affiliations: 
The Chinese University of Hong Kong, Hong Kong, Hong Kong 
Area:
Electronics and Electrical Engineering
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38 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Shi E, Godoy Dd, Kinget PR, Pun K. A 9.6 nW, 8-Bit, 100 S/s Envelope-to-Digital Converter for Respiratory Monitoring Ieee Transactions On Circuits and Systems Ii-Express Briefs. 67: 445-449. DOI: 10.1109/Tcsii.2019.2922661  0.504
2019 Chen Y, Wang X, Zhang Y, Pun K. A 0.4-V 0.2 pJ/step 90-dB SNDR 20-kHz CT delta-sigma modulator using class-AB amplifier with a novel local common-mode feedback Ieice Electronics Express. 16: 20190170-20190170. DOI: 10.1587/Elex.16.20190170  0.369
2019 Zhang Y, Basak D, Pun K. Power-Efficient Gm-C DSMs With High Immunity to Aliasing, Clock Jitter, and ISI Ieee Transactions On Very Large Scale Integration Systems. 27: 337-349. DOI: 10.1109/Tvlsi.2018.2874259  0.462
2019 Zhang Y, He X, Pun K. An Extremely Linear Multi-Level DAC for Continuous-Time Delta-Sigma Modulators Ieee Transactions On Circuits and Systems Ii-Express Briefs. 66: 367-371. DOI: 10.1109/Tcsii.2018.2859776  0.463
2019 Basak D, Kalani S, Zhang Y, Pun K. An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators Ieee Access. 7: 172097-172109. DOI: 10.1109/Access.2019.2956093  0.362
2018 Fu Z, Pun K. An SAR ADC Switching Scheme With MSB Prediction for a Wide Input Range and Reduced Reference Voltage Ieee Transactions On Very Large Scale Integration Systems. 26: 2863-2872. DOI: 10.1109/Tvlsi.2018.2866515  0.529
2018 Li D, Basak D, Zhang Y, Fu Z, Pun K. Improving Power Efficiency for Active- RC Delta-Sigma Modulators Using a Passive- RC Low-Pass Filter in the Feedback Ieee Transactions On Circuits and Systems Ii-Express Briefs. 65: 1559-1563. DOI: 10.1109/Tcsii.2017.2762325  0.46
2018 Basak D, Li D, Pun K. A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement Ieee Transactions On Circuits and Systems I-Regular Papers. 65: 1196-1209. DOI: 10.1109/Tcsi.2017.2740501  0.51
2017 Fu Z, Tang X, Pun K. Use DAS algorithm to break through the device limitations of switched-capacitor-based DAC in an ADC consisting of pipelined SAR and TDC Solid-State Electronics. 138: 119-125. DOI: 10.1016/J.Sse.2017.10.003  0.65
2015 Tang X, Ng WT, Pun KP. A resistor-based sub-1-V CMOS smart temperature sensor for VLSI thermal management Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1651-1660. DOI: 10.1109/Tvlsi.2014.2348328  0.603
2015 Rosa JMdl, Schreier R, Pun K, Pavan S. Next-Generation Delta-Sigma Converters: Trends and Perspectives Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 5: 484-499. DOI: 10.1109/Jetcas.2015.2502164  0.494
2015 Rosa JMdl, Schreier R, Pun K, Pavan S. Guest Editorial: Next-Generation Delta-Sigma Converters Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 5: 481-483. DOI: 10.1109/Jetcas.2015.2500966  0.311
2015 Ko C, Pun K, Gothenberg A. A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration Microelectronics Journal. 46: 1469-1480. DOI: 10.1016/J.Mejo.2015.06.016  0.469
2014 Sun L, Ko C, Pun K. Optimizing the Stage Resolution in Pipelined SAR ADCs for High-Speed High-Resolution Applications Ieee Transactions On Circuits and Systems Ii-Express Briefs. 61: 476-480. DOI: 10.1109/Tcsii.2014.2327372  0.397
2014 Li B, Sun L, Ko C, Wong AK, Pun K. A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches Ieee Transactions On Circuits and Systems. 61: 1928-1941. DOI: 10.1109/Tcsi.2014.2298285  0.512
2014 Li B, Pun K. A High Image-Rejection SC Quadrature Bandpass DSM for Low-IF Receivers Ieee Transactions On Circuits and Systems. 61: 92-105. DOI: 10.1109/Tcsi.2013.2268588  0.433
2014 Sun L, Pun K, Ng W. Capacitive digital-to-analogue converters with least significant bit down in differential successive approximation register ADCs The Journal of Engineering. 2014: 45-48. DOI: 10.1049/Joe.2013.0219  0.533
2014 Sun L, Pun K. Design considerations of calibration DAC in self-calibrated SAR A/D converters Microelectronics Journal. 45: 14-22. DOI: 10.1016/J.Mejo.2013.09.008  0.489
2013 Ho M, Ai Y, Chau TC-, Yuen SCL, Choy C, Leong PHW, Pun K. Architecture and Design Flow for a Highly Efficient Structured ASIC Ieee Transactions On Very Large Scale Integration Systems. 21: 424-433. DOI: 10.1109/Tvlsi.2012.2190478  0.428
2013 Pun K, Sun L, Li B. Unit capacitor array based SAR ADC Microelectronics Reliability. 53: 505-508. DOI: 10.1016/J.Microrel.2012.09.012  0.479
2013 Li B, Pun K. A continuous-time cascaded delta-sigma modulator with PMW-based automatic RC time constant tuning and correlated double sampling Microelectronics Journal. 44: 431-441. DOI: 10.1016/J.Mejo.2013.03.001  0.469
2012 Tang X, Ko C, Pun K. A charge-pump and comparator based power-efficient pipelined ADC technique Microelectronics Journal. 43: 182-188. DOI: 10.1016/J.Mejo.2011.12.009  0.646
2012 Ko C, Pun K, Gothenberg A. Vernier parallel delay-line based time-to-digital converter Analog Integrated Circuits and Signal Processing. 71: 151-153. DOI: 10.1007/S10470-011-9766-7  0.413
2012 Chen Y, Pun K. A 0.5-V 90-dB SNDR 102 dB-SFDR audio-band continuous-time delta---sigma modulator Analog Integrated Circuits and Signal Processing. 71: 159-169. DOI: 10.1007/S10470-011-9741-3  0.533
2011 Zhao Y, Tang S, Ko C, Pun K. A chopper-stabilized high-pass Delta-Sigma Modulator with reduced chopper charge injection Microelectronics Journal. 42: 733-739. DOI: 10.1016/J.Mejo.2011.02.002  0.524
2011 Chen Y, Pun KP, Kinget P. A 0.5-V 81.2 dB SNDR audio-band continuous-time Delta-Sigma modulator with SCR feedback Analog Integrated Circuits and Signal Processing. 67: 285-292. DOI: 10.1007/S10470-011-9605-X  0.521
2011 He XY, Pun KP, Tang SK, Choy CS, Kinget P. A 0.5 v 65.7 dB 1 MHz continuous-time complex delta sigma modulator Analog Integrated Circuits and Signal Processing. 66: 255-267. DOI: 10.1007/S10470-010-9530-4  0.521
2010 Leung KN, Choy CS, Pun K, Leung LLK, Guo J, Ng YS, Chan CF, Shi W, Hong Y, Ho M, Mak K, Ai Y. RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology Journal of Low Power Electronics. 6: 141-149. DOI: 10.1166/Jolpe.2010.1064  0.411
2010 Wong AKY, Leung KN, Pun K, Zhang Y. A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device Ieee Transactions On Circuits and Systems Ii: Express Briefs. 57: 531-535. DOI: 10.1109/Tcsii.2010.2048401  0.516
2010 Chan C, Pun K, Leung K, Guo J, Leung L-L, Choy C. A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders Ieee Journal of Solid-State Circuits. 45: 587-599. DOI: 10.1109/Jssc.2010.2040655  0.535
2010 Chan RP, Choy OC, Pun K, Chan C, Leung KN. Analysis of the behaviours of phase and amplitude mismatch compensators to achieve 82.5 dB image rejection ratio International Journal of Electronics. 97: 553-568. DOI: 10.1080/00207210903433833  0.414
2010 Cheng W, Chan C, Pun K, Choy C. A low voltage current mode CMOS integrated receiver front-end for GPS system Analog Integrated Circuits and Signal Processing. 63: 23-31. DOI: 10.1007/S10470-009-9409-4  0.527
2009 He XY, Pun KP, Kinget P. A 0.5-V wideband amplifier for a 1-MHz CT complex delta-sigma modulator Ieee Transactions On Circuits and Systems Ii: Express Briefs. 56: 805-809. DOI: 10.1109/Tcsii.2009.2029163  0.559
2009 Breems L, Kinget PR, Pun KP. Guest editorial: Special issue on circuits and systems solutions for nanoscale CMOS design challenges Ieee Transactions On Circuits and Systems Ii: Express Briefs. 56: 337-338. DOI: 10.1109/Tcsii.2009.2019173  0.51
2008 Tang S, Pun K, Choy C, Chan C, Leung KN. A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers Ieee Transactions On Circuits and Systems Ii-Express Briefs. 55: 653-657. DOI: 10.1109/Tcsii.2008.921579  0.436
2007 Pun KP, Chatterjee S, Kinget PR. A 0.5-V 74-dB SNDR 25-kHz continuous-time delta-sigma modulator with a return-to-open DAC Ieee Journal of Solid-State Circuits. 42: 496-506. DOI: 10.1109/Jssc.2006.891716  0.585
2005 Wong A, Pun K, Zhang Y, Hung K. A near-infrared heart rate measurement IC with very low cutoff frequency using current steering technique Ieee Transactions On Circuits and Systems. 52: 2642-2647. DOI: 10.1109/Tcsi.2005.857767  0.503
2003 Ho K, Chan C, Choy C, Pun K. Reversed nested Miller compensation with voltage buffer and nulling resistor Ieee Journal of Solid-State Circuits. 38: 1735-1738. DOI: 10.1109/Jssc.2003.817598  0.515
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