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Timothy Sherwood

Affiliations: 
Computer Science University of California, Santa Barbara, Santa Barbara, CA, United States 
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"Timothy Sherwood"
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Parents

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Children

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Yan Meng grad student 2006 UC Santa Barbara
Theodore D. Huffmire grad student 2007 UC Santa Barbara
Banit Agrawal grad student 2008 UC Santa Barbara
Ryan Dixon grad student 2009 UC Santa Barbara
Shashidhar C. Mysore grad student 2009 UC Santa Barbara
Hussam Mousa grad student 2010 UC Santa Barbara
Mohit Tiwari grad student 2011 UC Santa Barbara
Jeffrey C. Browne grad student 2013 UC Santa Barbara
Jonathan K. Valamehr grad student 2013 UC Santa Barbara

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Publications

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Cui W, Tzimpragos G, Tao Y, et al. (2020) Language Support for Navigating Architecture Design in Closed Form Acm Journal On Emerging Technologies in Computing Systems. 16: 1-28
Dangwal D, Tzimpragos G, Sherwood T. (2020) Agile Hardware Development and Instrumentation With PyRTL Ieee Micro. 40: 76-84
Dangwal D, Cui W, McMahan J, et al. (2020) Trace Wringing for Program Trace Privacy Ieee Micro. 40: 108-115
Madhavan A, Sherwood T, Strukov DB. (2018) High-Throughput Pattern Matching With CMOL FPGA Circuits: Case for Logic-in-Memory Computing Ieee Transactions On Very Large Scale Integration Systems. 26: 2759-2772
Mao B, Hu W, Althoff A, et al. (2018) Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1719-1732
McMahan J, Christensen M, Nichols L, et al. (2018) An Architecture for Analysis Ieee Micro. 38: 107-115
Madhavan A, Sherwood T, Strukov D. (2015) Race Logic: Abusing Hardware Race Conditions to Perform Useful Computation Ieee Micro. 35: 48-57
Hu W, Mu D, Oberg J, et al. (2014) Gate-level information flow tracking for security lattices Acm Transactions On Design Automation of Electronic Systems. 20
Oberg J, Meiklejohn S, Sherwood T, et al. (2014) Leveraging gate-level properties to identify hardware timing channels Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 33: 1288-1301
Wassel HMG, Gao Y, Oberg JK, et al. (2014) Networks on chip with provable security properties Ieee Micro. 34: 57-68
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