Yale N. Patt
Affiliations: | 1969-1976 | North Carolina State University, Raleigh, NC | |
1976-1988 | San Francisco State University, San Francisco, CA, United States | ||
1979-1988 | University of California, Berkeley, Berkeley, CA, United States | ||
1988-1999 | University of Michigan, Ann Arbor, Ann Arbor, MI | ||
1999- | Electrical and Computer Engineering | University of Texas at Austin, Austin, Texas, U.S.A. |
Area:
Electronics and Electrical Engineering, Computer ScienceWebsite:
https://www.ece.utexas.edu/people/faculty/yale-pattGoogle:
"Yale Nance Patt" OR "Yale N. Patt"Bio:
https://searchworks.stanford.edu/view/2189137
https://books.google.com/books?id=bGvdVdNe0C4C
DOI: 10.1145/1465482.1465595 The author also wishes to acknowledge with thanks the advice and comments of his former thesis advisors at Stanford University, Dr. Richard L. Mattson and Dr. C. Hugh Mays
https://dl.acm.org/doi/pdf/10.1145/1465482.1465595
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Parents
Sign in to add mentorRichard Lewis Mattson | grad student | 1966 | Stanford (Computer Science Tree) | |
(Minimal Module Synthesis of Switching Functions) | ||||
C. Hugh Mays | grad student | 1966 | Stanford |
Children
Sign in to add traineeWen-mei W. Hwu | grad student | 1987 | UC Berkeley (Computer Science Tree) |
Paul B. Racunas | grad student | 2003 | University of Michigan |
Robert S. Chappell | grad student | 2004 | University of Michigan |
Onur Mutlu | grad student | 2006 | UT Austin (Computer Science Tree) |
Hyesoon Kim | grad student | 2007 | UT Austin |
Moinuddin K. Qureshi | grad student | 2007 | UT Austin |
Francis Tseng | grad student | 2007 | UT Austin |
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Publications
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Mutlu O, Belgard R, Gross TR, et al. (2016) Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor Ieee Micro. 36: 70-85 |
Hashemi M, Marr D, Carmean D, et al. (2016) Efficient Execution of Bursty Applications Ieee Computer Architecture Letters. 15: 85-88 |
Hashemi M, Patt YN. (2015) Filtered runahead execution with a runahead buffer Proceedings of the Annual International Symposium On Microarchitecture, Micro. 5: 358-369 |
Joao JA, Suleman MA, Mutlu O, et al. (2013) Utility-based acceleration of multithreaded applications on asymmetric CMPs Proceedings - International Symposium On Computer Architecture. 154-165 |
Ebrahimi E, Lee CJ, Mutlu O, et al. (2012) Fairness via source throttling: A configurable and high-performance fairness substrate for multicore memory systems Acm Transactions On Computer Systems. 30 |
Joao JA, Suleman MA, Mutlu O, et al. (2012) Bottleneck identification and scheduling in multithreaded applications International Conference On Architectural Support For Programming Languages and Operating Systems - Asplos. 223-234 |
Khubaib, Suleman MA, Hashemi M, et al. (2012) MorphCore: An energy-efficient microarchitecture for high performance ILP and high throughput TLP Proceedings - 2012 Ieee/Acm 45th International Symposium On Microarchitecture, Micro 2012. 305-316 |
Miftakhutdinov R, Ebrahimi E, Patt YN. (2012) Predicting performance impact of DVFS for realistic memory systems Proceedings - 2012 Ieee/Acm 45th International Symposium On Microarchitecture, Micro 2012. 155-165 |
Ebrahimi E, Miftakhutdinov R, Fallin C, et al. (2011) Parallel application memory scheduling Proceedings of the Annual International Symposium On Microarchitecture, Micro. 362-373 |
Narasiman V, Shebanow M, Lee CJ, et al. (2011) Improving GPU performance via large warps and two-level warp scheduling Proceedings of the Annual International Symposium On Microarchitecture, Micro. 308-317 |