Prithviraj Banerjee
Affiliations: | Northwestern University, Evanston, IL |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Prithviraj Banerjee"Children
Sign in to add traineeDhruva R. Chakrabarti | grad student | 2000 | Northwestern |
Pramod G. Joisha | grad student | 2003 | Northwestern |
Tianyi Jiang | grad student | 2004 | Northwestern |
Xiaoyong Tang | grad student | 2004 | Northwestern |
Gaurav Mittal | grad student | 2005 | Northwestern |
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Publications
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Harrison C, Jiang T, Banerjee P, et al. (2013) Polyomavirus large T antigen binds symmetrical repeats at the viral origin in an asymmetrical manner. Journal of Virology. 87: 13751-9 |
Joisha PG, Banerjee P. (2007) A translator system for the MATLAB language: Research Articles Software - Practice and Experience. 37: 535-578 |
Joisha PG, Banerjee P. (2007) A translator system for the MATLAB language Software - Practice and Experience. 37: 535-578 |
Joisha PG, Banerjee P. (2006) An algebraic array shape inference system for MATLAB® Acm Transactions On Programming Languages and Systems. 28: 848-907 |
Tang X, Jiang T, Jones AK, et al. (2005) High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits Journal of Low Power Electronics. 1: 259-272 |
Banerjee P, Haldar M, Nayak A, et al. (2004) Overview of a Compiler for Synthesizing MATLAB Programs onto FPGAs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 312-324 |
Kandemir M, Choudhary A, Ramanujam J, et al. (2003) Reducing false sharing and improving spatial locality in a unified compilation framework Ieee Transactions On Parallel and Distributed Systems. 14: 337-354 |
Mishra A, Banerjee P. (2003) An algorithm-based error detection scheme for the multigrid method Ieee Transactions On Computers. 52: 1089-1099 |
Banerjee P. (2003) An overview of a compiler for mapping MATLAB programs onto FPGAs Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2003: 477-482 |
Krishnaswamy V, Hasteer G, Banerjee P. (2002) Automatic parallelization of compiled event driven VHDL simulation Ieee Transactions On Computers. 51: 380-394 |