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Konrad Slind

Affiliations: 
University of Utah, Salt Lake City, UT 
Area:
Computer Science
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"Konrad Slind"
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Annette Bunker grad student 2004 University of Utah
Scott Owens grad student 2007 University of Utah

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Publications

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Hardin D, Slind K, Whalen M, et al. (2012) The Guardol language and verification system Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 7214: 18-32
Slind K, Li G, Owens S. (2010) Compiling higher order logic by proof Design and Verification of Microprocessor Systems For High-Assurance Applications. 193-220
Myreen MO, Slind K, Gordon MJC. (2009) Extensible proof-producing compilation Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 5501: 2-16
Owens S, Slind K. (2008) Adapting functional programs to higher order logic Higher-Order and Symbolic Computation. 21: 377-409
Slind K, Owens S, Iyoda J, et al. (2007) Proof producing synthesis of arithmetic and cryptographic hardware Formal Aspects of Computing. 19: 343-362
Kaufmann M, Slind K. (2007) Proof pearl: Wellfounded induction on the ordinals up to ε0 Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4732: 294-301
Li G, Slind K. (2007) Compilation as rewriting in higher order logic Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4603: 19-34
Li G, Owens S, Slind K. (2007) Structure of a proof-producing compiler for a subset of higher order logic Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4421: 205-219
Gordon M, Iyoda J, Owens S, et al. (2006) Automatic formal synthesis of hardware from higher order logic Electronic Notes in Theoretical Computer Science. 145: 27-43
Bunker A, Gopalakrishnan G, Slind K. (2005) Live sequence charts applied to hardware requirements specification and verification. A VCI bus interface model International Journal On Software Tools For Technology Transfer. 7: 341-350
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