Wen-mei W. Hwu

Affiliations:

University of Illinois, Urbana-Champaign, Urbana-Champaign, IL

Area:

Electronics and Electrical Engineering, Computer Science

Parents

Yale N. Patt	grad student	1987	UC Berkeley (E-Tree)
(HPSm: Exploiting concurrency to achieve high performance in a single-chip microarchitecture)

Children

Scott A. Mahlke	grad student
Thomas M. Conte	grad student	1988-1992	UIUC
Ben-Chung Cheng	grad student	2000	UIUC
Daniel Connors	grad student	2000	UIUC (E-Tree)
Le-Chun Wu	grad student	2000	UIUC
Jeffrey P. Monks	grad student	2001	UIUC
Matthew C. Merten	grad student	2002	UIUC
Marie T. Conte	grad student	2003	UIUC
Hillery C. Hunter	grad student	2004	UIUC
Hong-Seok Kim	grad student	2004	UIUC
Erik M. Nystrom	grad student	2005	UIUC
John W. Sias	grad student	2005	UIUC
Chien-Wei Li	grad student	2006	UIUC
Shane Ryoo	grad student	2008	UIUC
Nicholas C. Bray	grad student	2010	UIUC
Sara S. Baghsorkhi	grad student	2011	UIUC
John A. Stratton	grad student	2013	UIUC
I-Jui Sung	grad student	2013	UIUC
Xiao-Long Wu	grad student	2013	UIUC
Christopher Rodrigues	grad student	2014	UIUC
Sitao Huang	grad student	2014-2021	UIUC (E-Tree)

Collaborators

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Publications

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Ankit A, Hajj IE, Chalamalasetti SR, et al. (2020) PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-Efficient ReRAM Ieee Transactions On Computers. 69: 1128-1142
Hwu W, Patel S. (2018) Accelerator Architectures A Ten-Year Retrospective Ieee Micro. 38: 56-62
Mutlu O, Mahlke S, Conte T, et al. (2018) Iterative Modulo Scheduling Ieee Micro. 38: 115-117
Min S, Alian M, Hwu W, et al. (2018) Semi-Coherent DMA: An Alternative I/O Coherency Management for Embedded Systems Ieee Computer Architecture Letters. 17: 221-224
Cecilia JM, Llanes A, Abellán JL, et al. (2018) High-throughput Ant Colony Optimization on graphics processing units Journal of Parallel and Distributed Computing. 113: 261-274
Kim NS, Chen D, Xiong J, et al. (2017) Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era Ieee Micro. 37: 10-18
Chen Y, Nguyen T, Chen Y, et al. (2016) FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs With the FCUDA Flow Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 2032-2045
Mutlu O, Belgard R, Gross TR, et al. (2016) Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor Ieee Micro. 36: 70-85
Kindratenko V, Wilhelmson R, Brunner R, et al. (2010) High-Performance Computing with Accelerators Computing in Science & Engineering. 12: 12-16
Hwu W, Rodrigues C, Ryoo S, et al. (2009) Compute Unified Device Architecture Application Suitability Computing in Science & Engineering. 11: 16-26

Wen-mei W. Hwu

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Parents

Children

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Publications