Rabi N. Mahapatra

Affiliations: 
Texas A & M University, College Station, TX, United States 
Area:
Computer Science
Google:
"Rabi Mahapatra"

Children

Sign in to add trainee
Praveen S. Bhojwani grad student 2007 Texas A & M
Rohit Singhal grad student 2007 Texas A & M
Yoonjin Kim grad student 2009 Texas A & M
Heeyeol Yu grad student 2009 Texas A & M
Amitava Biswas grad student 2010 Texas A & M
Amar A. Rasheed grad student 2010 Texas A & M
Suman K. Mandal grad student 2011 Texas A & M
Suneil Mohan grad student 2012 Texas A & M
Jyotikrishna Dass grad student 2014-2020 Texas A & M University - College Station
BETA: Related publications

Publications

You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect.

Dass J, Narawane Y, Mahapatra RN, et al. (2020) Distributed Training of Support Vector Machine on a Multiple-FPGA System Ieee Transactions On Computers. 69: 1015-1026
Yiu YF, Du J, Mahapatra R. (2019) Evolutionary Heuristic A* Search: Pathfinding Algorithm with Self-Designed and Optimized Heuristic Function International Journal of Semantic Computing. 13: 5-23
Dass J, Sarin V, Mahapatra RN. (2019) Fast and Communication-Efficient Algorithm for Distributed Support Vector Machine Training Ieee Transactions On Parallel and Distributed Systems. 30: 1065-1076
Chittamuru SVR, Dang D, Pasricha S, et al. (2018) BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures Ieee Transactions On Parallel and Distributed Systems. 29: 2402-2415
Tang J, Mahapatra RN, Meng Q, et al. (2018) Hybrid algorithm for accumulated error suppression in open-loop Doppler receiver Iet Communications. 12: 765-770
Tang J, Xia L, Mahapatra R. (2018) An open-loop system design for deep space signal processing applications Acta Astronautica. 147: 259-272
Mandal A, Khatri SP, Mahapatra RN. (2014) Source-synchronous networks-on-chip: Circuit and architectural interconnect modeling Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling. 2147483647: 1-143
Mandal A, Khatri SP, Mahapatra RN. (2013) A source-synchronous Htree-based network-on-chip Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 161-166
Mandal S, Bhojwani P, Mohanty S, et al. (2013) IntellBatt: The Smart Battery Ieee Computer. 1-1
Mandai A, Khatri SP, Mahapatra RN. (2013) Exploring topologies for source-synchronous ring-based network-on-chip Proceedings -Design, Automation and Test in Europe, Date. 1026-1031
See more...