Hemayet Hossain, Ph.D.
Affiliations: | 2010 | University of Rochester, Rochester, NY |
Area:
Computer ScienceGoogle:
"Hemayet Hossain"Parents
Sign in to add mentor| Sandhya Dwarkadas | grad student | 2010 | Rochester | |
| (Effective on-chip cache utilization in chip multiprocessors.) | ||||
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Publications
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| Hossain H, Dwarkadas S, Huang MC. (2011) POPS: Coherence protocol optimization for both private and shared data Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 45-55 |
| Hossain H, Dwarkadas S, Huang MC. (2009) DDCache: Decoupled and delegable cache data and metadata Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 227-236 |
| Hossain H, Dwarkadas S, Huang MC. (2008) Improving support for locality and fine-grain sharing in chip multiprocessors Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 155-165 |
| Shriraman A, Spear MF, Hossain H, et al. (2007) An integrated hardware-software approach to flexible transactional memory Proceedings - International Symposium On Computer Architecture. 104-115 |
| Spear MF, Shriraman A, Hossain H, et al. (2007) Alert-on-update: A communication aid for shared memory multiprocessors Proceedings of the Acm Sigplan Symposium On Principles and Practice of Parallel Programming, Ppopp. 132-133 |
| Hossain H, Akbar MM, Islam MM. (2005) Extended-butterfly fat tree interconnection (EFTI) architecture for network on chip Ieee Pacific Rim Conference On Communications, Computers, and Signal Processing - Proceedings. 2005: 613-616 |