Rodolfo Pellizzoni, Ph.D.
Affiliations: | 2010 | University of Illinois, Urbana-Champaign, Urbana-Champaign, IL |
Area:
Computer Science, Computer EngineeringGoogle:
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Publications
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Garg T, Wasly S, Pellizzoni R, et al. (2020) HopliteBuf: Network Calculus-Based Design of FPGA NoCs with Provably Stall-Free FIFOs Acm Transactions On Reconfigurable Technology and Systems. 13: 1-35 |
Mirosanlou R, Guo D, Hassan M, et al. (2020) MCsim: An Extensible DRAM Memory Controller Simulator Ieee Computer Architecture Letters. 19: 105-109 |
Tabish R, Mancuso R, Wasly S, et al. (2019) A real-time scratchpad-centric OS with predictable inter/intra-core communication for multi-core embedded systems Real-Time Systems. 55: 850-888 |
Guo D, Hassan M, Pellizzoni R, et al. (2018) A Comparative Study of Predictable DRAM Controllers Acm Transactions in Embedded Computing Systems. 17: 53 |
Hassan M, Pellizzoni R. (2018) Bounding DRAM Interference in COTS Heterogeneous MPSoCs for Mixed Criticality Systems Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 2323-2336 |
Hassan M, Patel H, Pellizzoni R. (2017) PMC: A Requirement-Aware DRAM Controller for Multicore Mixed Criticality Systems Acm Transactions in Embedded Computing Systems. 16: 100 |
Yao G, Pellizzoni R, Bak S, et al. (2016) Global Real-Time Memory-Centric Scheduling for Multicore Systems Ieee Transactions On Computers. 65: 2739-2751 |
Yun H, Yao G, Pellizzoni R, et al. (2016) Memory bandwidth management for efficient performance isolation in multi-core platforms Ieee Transactions On Computers. 65: 562-576 |
Yao G, Yun H, Wu ZP, et al. (2016) Schedulability analysis for memory bandwidth regulated multicore real-time systems Ieee Transactions On Computers. 65: 601-614 |
Alhammad A, Pellizzoni R. (2016) Trading Cores for Memory Bandwidth in Real-Time Systems 2016 Ieee Real-Time and Embedded Technology and Applications Symposium, Rtas 2016 - Proceedings |