Mohammad G. Mohammad, Ph.D.
Affiliations: | 2002 | University of Wisconsin, Madison, Madison, WI |
Area:
Electronics and Electrical EngineeringGoogle:
"Mohammad Mohammad"Parents
Sign in to add mentor| Kewal K. Saluja | grad student | 2002 | UW Madison | |
| (Flash memory disturb faults: Modeling, simulation, and test.) | ||||
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Publications
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| Mohammad MG. (2011) Fault model and test procedure for phase change memory Iet Computers and Digital Techniques. 5: 263-270 |
| Almukhaizim S, Mohammad M, AlQuraishi E. (2010) Cost-free low-power test in compression-based reconfigurable scan designs Intelligent Decision Technologies. 78-82 |
| Mohammad MG, Saluja KK. (2008) Testing flash memories for tunnel oxide defects Proceedings of the Ieee International Frequency Control Symposium and Exposition. 157-162 |
| Mohammad MG, Saluja KK. (2008) Analysis and test procedures for NOR flash memory defects Microelectronics Reliability. 48: 698-709 |
| Mohammad MG, Terkawi L. (2007) Techniques for Disturb Fault Collapsing Journal of Electronic Testing. 23: 363-368 |
| Mohammad MG, Saluja KK. (2005) Optimizing program disturb fault tests using defect-based testing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 905-915 |
| Mohammad MG, Saluja KK. (2003) Simulating Program Disturb Faults in Flash Memories Using SPICE Compatible Electrical Model Ieee Transactions On Electron Devices. 50: 2286-2291 |
| Mohammad MG, Saluja KK. (2003) Electrical model for program disturb faults in non-volatile memories Proceedings of the Ieee International Conference On Vlsi Design. 2003: 217-222 |
| Mohammad MG, Saluja KK, Yap AS. (2001) Fault models and test procedures for flash memory disturbances Journal of Electronic Testing: Theory and Applications (Jetta). 17: 495-508 |
| Mohammad MG, Saluja KK. (2001) Flash memory disturbances: Modeling and test Proceedings of the Ieee Vlsi Test Symposium. 218-224 |