Muhammad M. Nisar, Ph.D.
Affiliations: | 2010 | Georgia Institute of Technology, Atlanta, GA |
Area:
Electronics and Electrical EngineeringGoogle:
"Muhammad Nisar"Parents
Sign in to add mentorAbhijit Chatterjee | grad student | 2010 | Georgia Tech | |
(Robust low -power signal processing and communication algorithms.) |
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Publications
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Nisar MM, Chatterjee A. (2011) Guided probabilistic checksums for error control in low-power digital filters Ieee Transactions On Computers. 60: 1313-1326 |
Nisar MM, Barlas I, Roemer M. (2010) Analysis and asymmetric sizing of CMOS circuits for increased transient error tolerance Aiaa Infotech At Aerospace 2010 |
Nisar MM, Chatterjee A. (2009) Environment and process adaptive low power wireless baseband signal processing using dual real-time feedback Journal of Low Power Electronics. 5: 313-325 |
Natarajan J, Kumar G, Sen S, et al. (2009) Aggressively voltage overscaled adaptive RF systems using error control at the bit and symbol levels 2009 15th Ieee International On-Line Testing Symposium, Iolts 2009. 249-254 |
Nisar MM, Senguttuvan R, Chatterjee A. (2008) Adaptive signal scaling driven critical path modulation for low power baseband OFDM processors Proceedings of the Ieee International Frequency Control Symposium and Exposition. 71-76 |
Nisar MM, Chatterjee A. (2008) Guided probabilistic checksums for error control in low power digital-filters Proceedings - 14th Ieee International On-Line Testing Symposium, Iolts 2008. 239-244 |
Ashouei M, Nisar MM, Chatterjee A, et al. (2007) Probabilistic self-adaptation of nanoscale CMOS circuits: Yield maximization under increased intra-die variations Proceedings of the Ieee International Conference On Vlsi Design. 711-716 |
Nisar MM, Ashouei M, Chatterjee A. (2007) Probabilistic concurrent error compensation in nonlinear digital filters using linearized checksums Proceedings - Iolts 2007 13th Ieee International On-Line Testing Symposium. 173-178 |