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Dean L. Lewis, Ph.D.

Affiliations: 
2012 Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, GA 
Area:
Computer Engineering, Electronics and Electrical Engineering
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Hsien-Hsin S. Lee grad student 2012 Georgia Tech
 (Design for pre-bond testability in 3D integrated circuits.)

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Kim DH, Athikulwongse K, Healy MB, et al. (2015) Design and analysis of 3D-MAPS (3D Massively parallel processor with stacked memory) Ieee Transactions On Computers. 64: 112-125
Zhao X, Lewis DL, Lee HHS, et al. (2011) Low-power clock tree design for pre-bond testing of 3-D stacked ICs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 732-745
Woo DH, Seong NH, Lewis DL, et al. (2010) An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth Proceedings - International Symposium On High-Performance Computer Architecture
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