Sudarshan K. Srinivasan, Ph.D.
Affiliations: | 2007 | Georgia Institute of Technology, Atlanta, GA |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Sudarshan Srinivasan"Parents
Sign in to add mentorPanagiotis Manolios | grad student | 2007 | Georgia Tech | |
(Efficient verification of bit-level pipelined machines using refinement.) |
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Publications
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Shaukat N, Shuja S, Srinivasan SK, et al. (2020) Improved Efficiency of Object Code Verification Using Statically Abstracted Object Code Scientific Programming. 2020: 1-19 |
Sakib AA, Smith SC, Srinivasan SK. (2019) Formal Modeling and Verification of PCHB Asynchronous Circuits Ieee Transactions On Very Large Scale Integration Systems. 27: 2911-2924 |
Srinivasan SK, Cai Y, Sarker K. (2012) Refinement-based verification of elastic pipelined systems Iet Computers and Digital Techniques. 6: 136-152 |
Srinivasan SK. (2010) Optimization techniques for verification of out-of-order execution machines Journal of Electrical and Computer Engineering |
Srinivasan SK. (2010) Automatic refinement checking of pipelines with out-of-order execution Ieee Transactions On Computers. 59: 1138-1144 |
Manolios P, Srinivasan SK. (2010) Verifying pipelines with BAT Design and Verification of Microprocessor Systems For High-Assurance Applications. 145-174 |
Srinivasan SK, Sarker K, Katti RS. (2009) Token-Aware Completion Functions for Elastic Processor Verification Journal of Electrical and Computer Engineering. 2009: 1-5 |
Srinivasan SK, Sarker K, Katti RS. (2009) Verification of synchronous elastic processors Ieee Embedded Systems Letters. 1: 14-18 |
Manolios P, Srinivasan SK. (2008) Automatic verification of safety and liveness for pipelined machines using WEB refinement Acm Transactions On Design Automation of Electronic Systems. 13 |
Manolios P, Srinivasan SK. (2008) A refinement-based compositional reasoning framework for pipelined machine verification Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 353-364 |